Datasheet

Z04 Series
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Fig. 1: Maximum power dissipation versus RMS
on-state current (full cycle).
Fig. 2: RMS on-state current versus ambient
temperature (full cycle).
Fig. 3: Relative variation of thermal impedance
junction to ambient versus pulse duration.
Fig. 4: Relative variation of gate trigger current,
holding current and latching current versus
junction temperature (typical values).
Fig. 5: Surge peak on-state current versus
number of cycles.
Fig. 6: Non-repetitive surge peak on-state
current for a sinusoidal pulse with width
tp < 10ms, and corresponding value of I²t.
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
0
1
2
3
4
5
6
7
IT(RMS)(A)
P(W)
0 25 50 75 100 125
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
IT(RMS)(A)
Rth(j-a)=Rth(j-l)
Rth(j-a)=100°C/W
Tamb(°C)
1E-3 1E-2 1E-1 1E+0 1E+1 1E+2 5E+2
1E-3
1E-2
1E-1
1E+0
tp(s)
K=[Zth(j-a)/Rth(j-a)]
-40 -20 0 20 40 60 80 100 120 140
0.0
0.5
1.0
1.5
2.0
2.5
Tj(°C)
IGT,IH,IL [Tj] / IGT,IH,IL [Tj=25°C]
IGT
IH & IL
1 10 100 1000
0
5
10
15
20
25
Number of cycles
ITSM(A)
Non repetitive
Tj initial=25°C
Repetitive
Tamb=25°C
One cycle
t=20ms
0.01 0.10 1.00 10.00
1
10
100
500
tp (ms)
ITSM (A), I²t (A²s)
Tj initial=25°C
ITSM
I²t
dI/dt limitation:
20A/µs