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September 2013 Doc ID 018529 Rev 2 1/21

VNS3NV04DP-E

OMNIFET II

fully autoprotected Power MOSFET

Features

■ ECOPACK

: lead free and RoHS compliant

■ Automotive Grade: compliance with AEC

guidelines

■ Linear current limitation

■ Thermal shutdown

■ Short circuit protection

■ Integrated clamp

■ Low current drawn from input pin

■ Diagnostic feedback through input pin

■ ESD protection

■ Direct access to the gate of the Power

MOSFET (analog driving)

■ Compatible with standard Power MOSFET

Description

The VNS3NV04DP-E device is made up of two

monolithic chips (OMNIFET II) housed in a

standard SO-8 package. The OMNIFET II is

designed using STMicroelectronics™ VIPower™

M0-3 technology and is intended for replacement

of standard Power MOSFETs in up to 50 kHz DC

applications.

Built-in thermal shutdown, linear current limitation

and overvoltage clamp protect the chip in harsh

environments.

Fault feedback can be detected by monitoring

voltage at the input pin

Max on-state resistance (per ch.) R

120 mΩ

Current limitation (typ) I

LIMH

3.5 A

Drain-source clamp voltage V

CLAMP

40 V

SO-8

Table 1. Device summary

Package

Order codes

Tube Tape and reel

SO-8 VNS3NV04DP-E VNS3NV04DPTR-E

www.st.com

Summary of content (21 pages)

PAGE 1
VNS3NV04DP-E OMNIFET II fully autoprotected Power MOSFET Features Max on-state resistance (per ch.) RON 120 mΩ Current limitation (typ) ILIMH 3.
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Contents VNS3NV04DP-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 4 5 2/21 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . .
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VNS3NV04DP-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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List of figures VNS3NV04DP-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. 4/21 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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VNS3NV04DP-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram DRAIN2 DRAIN1 OVERVOLTAGE CLAMP OVERVOLTAGE CLAMP INPUT1 GATE CONTROL GATE CONTROL OVER TEMPERATURE LINEAR CURRENT LIMITER LINEAR CURRENT LIMITER SOURCE1 Figure 2.
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Electrical specifications 2 VNS3NV04DP-E Electrical specifications Figure 3. Current and voltage conventions RIN1 IIN1 ID1 INPUT 1 VIN1 IIN2 DRAIN 1 RIN2 ID2 INPUT 2 VIN2 2.1 SOURCE 1 VDS1 DRAIN 2 VDS1 SOURCE 2 Absolute maximum ratings Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device.
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VNS3NV04DP-E 2.2 Electrical specifications Thermal data Table 3. Thermal data Symbol Parameter Rthj-lead Thermal resistance junction-lead (per channel) Rthj-amb Thermal resistance junction-ambient Max value Unit 30 °C/W 80(1) °C/W 2 1. When mounted on a standard single-sided FR4 board with 50mm of Cu (at least 35 μm thick) connected to all DRAIN pins of the relative channel 2.
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Electrical specifications Table 7. Symbol td(on) tr td(off) tf td(on) tr td(off) tf VNS3NV04DP-E Switching Parameter Test conditions Turn-on delay time VDD = 15 V; ID = 1.5 A; Vgen = 5 V; Rgen = RIN MIN = 220 Ω (see Figure 4) Rise time Turn-off delay time Fall time Turn-on delay time VDD = 15 V; ID = 1.5 A; Vgen = 5 V; Rgen = 2.2 KΩ (see Figure 4) Rise time Turn-off delay time Fall time (dI/dt)on Turn-on current slope Qi Table 8.
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VNS3NV04DP-E Figure 4. Electrical specifications Switching time test circuit for resistive load VD Rgen Vgen ID 90% tr tf 10% t td(on) Vgen td(off) t Figure 5. Test circuit for diode recovery times A A D I FAST DIODE OMNIFET S L=100uH B B 220Ω D Rgen VDD I Vgen OMNIFET S 8.
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Electrical specifications Figure 6. VNS3NV04DP-E Unclamped inductive load test circuits RGEN VIN PW Figure 7.
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VNS3NV04DP-E Figure 8.
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Electrical specifications 2.4 VNS3NV04DP-E Electrical characteristics curves Figure 9. Source-drain diode forward characteristics Figure 10. Static drain-source on resistance Vsd (mV) Rds(on) (mohms) 1100 1000 1050 Tj=-40ºC 900 Vin=0V 1000 Vin=2.5V 800 950 700 900 600 850 500 800 400 750 300 700 200 650 100 Tj=25ºC Tj=150ºC 0 600 0 1 2 3 4 5 6 7 8 9 10 11 0.05 12 0.1 0.15 0.2 0.25 Figure 11. Derating curve 0.3 0.35 0.4 0.45 0.5 0.
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VNS3NV04DP-E Electrical specifications Figure 15. Static drain-source on resistance vs Id Figure 16. Transfer characteristics Idon (A) Rds(on) (mohms) 250 6 225 5.5 Vin=5V 200 Vds=13.5V 5 Tj=150ºC 4.5 175 4 150 Tj=150ºC 3.5 125 3 Tj=25ºC 100 Tj=-40ºC 2.5 2 75 1.5 50 Tj= - 40ºC Tj=25ºC 1 25 0.5 0 0 0 0.5 1 1.5 2 2.5 3 3.5 4 1.5 2 2.5 3 Id (A) 3.5 4 4.5 5 5.5 6 Vin (V) Figure 17. Turn-on current slope (part 1) Figure 18.
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Electrical specifications VNS3NV04DP-E Figure 21. Turn-off drain-source voltage Figure 22. Capacitance variations slope (part 2) dv/dt(V/usec) C(pF) 300 350 275 Vin=3.5V Vdd=15V Id=1.5A 250 225 300 f=1MHz Vin=0V 200 250 175 150 200 125 100 150 75 50 100 25 0 50 0 500 1000 250 750 1500 1250 2000 1750 2500 0 2250 5 10 15 20 25 30 35 Vds(V) Rg(ohm) Figure 23. Switching time resistive load Figure 24.
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VNS3NV04DP-E Electrical specifications Figure 27. Normalized input threshold voltage vs temperature Figure 28. Normalized current limit vs junction temperature Vinth (V) Ilim (A) 10 2 1.8 9 Vds=Vin Id=1mA 1.6 1.4 7 1.2 6 1 5 0.8 4 0.6 3 0.4 2 0.2 1 0 0 -50 -25 0 Vin=5V Vds=13V 8 25 50 75 100 125 150 175 Tc (ºC) -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) Figure 29. Step response current limit Tdlim(usec) 13 12.5 Vin=5V Rg=220ohm 12 11.5 11 10.5 10 9.5 9 8.
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Protection features 3 VNS3NV04DP-E Protection features During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50 KHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100 µA) flows into the INPUT pin in order to supply the internal circuitry. The following sections describe the device features.
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VNS3NV04DP-E Package and packing information 4 Package and packing information 4.1 ECOPACK® packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.2 SO-8 mechanical data Table 10. SO-8 mechanical data mm Dim. Min. Typ. A Max. 1.75 A1 0.10 A2 1.25 b 0.
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Package and packing information VNS3NV04DP-E Figure 30.
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VNS3NV04DP-E 4.3 Package and packing information SO-8 packing information Figure 31. SO-8 tube shipment (no suffix) B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C A 100 2000 532 3.2 6 0.6 All dimensions are in mm. Figure 32. Tape and reel shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm.
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Revision history 5 VNS3NV04DP-E Revision history Table 11. 20/21 Document revision history Date Revision Changes 09-Mar-2011 1 Initial release.
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VNS3NV04DP-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.