Datasheet

VNQ5160K-E Electrical specifications
Doc ID 13349 Rev 7 11/30
Figure 4. Status timings
Figure 5. Output voltage drop limitation
I
SDH
High level STAT_DIS
current
V
SD
=2.1V 10 A
V
SD(hyst)
STAT_DIS hysteresis
voltage
0.25 V
V
SDCL
STAT_DIS clamp voltage
I
SD
=1mA
I
SD
=-1mA
5.5
-0.7
7V
V
Table 11. Logic input (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IN
V
STAT
t
POL
OPEN LOAD STATUS TIMING (without external pull-up)
I
OUT
< I
OL
V
OUT
< V
OL
t
DOL(on)
V
IN
V
STAT
OPEN LOAD STATUS TIMING (with external pull-up)
I
OUT
< I
OL
V
OUT
> V
OL
t
DOL(on)
V
IN
V
STAT
OVER TEMP STATUS TIMING
t
SDL
t
SDL
T
j
> T
TSD
V
IN
V
STAT
t
DSTKON
OUTPUT STUCK TO Vcc
I
OUT
> I
OL
V
OUT
> V
OL
t
DOL(on)
V
on
I
out
V
cc
-V
out
T
j
=150
o
C
T
j
=25
o
C
T
j
=-40
o
C
V
on
/R
on(T)