Datasheet

VNQ5050AK-E Electrical specifications
Doc ID 13329 Rev 10 11/31
I
SENSEH
Analog sense output
current in over
temperature condition
V
CC
= 13 V; V
SENSE
= 5 V - 8 - mA
t
DSENSE1H
Delay response time
from falling edge of
CS_DIS pin
V
SENSE
<4 V, 0.5 A<Iout<4 A
I
SENSE
= 90 % of I
SENSE max
(see Figure 4)
-50100µs
t
DSENSE1L
Delay response time
from rising edge of
CS_DIS pin
V
SENSE
<4 V, 0.5 A<Iout<4 A
I
SENSE
=10 % of I
SENSE max
(see Figure 4)
-520µs
t
DSENSE2H
Delay response time
from rising edge of
INPUT pin
V
SENSE
<4 V, 0.5 A<Iout<4 A
I
SENSE
=90 % of I
SENSE max
(see Figure 4)
-80250µs
Δ t
DSENSE2H
Delay response time
between rising edge of
output current and
rising edge of current
sense
V
SENSE
<4 V,
I
SENSE
=90 % of I
SENSEMAX,
I
OUT
=90 % of I
OUTMAX
I
OUTMAX
=2 A (see Figure 5)
--65µs
t
DSENSE2L
Delay response time
from falling edge of
INPUT pin
V
SENSE
<4 V, 0.5 A<Iout<4 A
I
SENSE
=10 % of I
SENSE max
(see Figure 4)
- 100 250 µs
1. Parameter guaranteed by design; it is not tested.
Table 9. Protection
(1)
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
DC short circuit
current
V
CC
=13 V
5V<V
CC
<36 V
13.5 19 26.5
26.5
A
A
I
limL
Short circuit current
during thermal
cycling
V
CC
=13 V; T
R
<T
j
<T
TSD
-7-A
T
TSD
Shutdown
temperature
150 175 200 °C
T
R
Reset temperature T
RS
+ 1 T
RS
+ 5 - °C
T
RS
Thermal reset of
STATUS
135 - - °C
T
HYST
Thermal hysteresis
(T
TSD
-T
R
)
-7-°C
V
DEMAG
Turn-off output
voltage clamp
I
OUT
=2 A; V
IN
=0; L=6 mH V
CC
-41 V
CC
-46 V
CC
-52 V
V
ON
Output voltage drop
limitation
I
OUT
=0.1 A; T
j
=-40 °C...150 °C
(see Figure 9)
-25-mV
Table 8. Current sense (8V<V
CC
<16V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit