VNN7NV04P-E, VNS7NV04P-E OMNIFET II fully autoprotected Power MOSFET Features Type RDS(on) Ilim Vclamp VNN7NV04P-E VNS7NV04P-E 60 mΩ 6A 40 V ■ Linear current limitation ■ Thermal shutdown ■ Short circuit protection ■ Integrated clamp ■ Low current drawn from input pin ■ Diagnostic feedback through input pin ■ ESD protection ■ Direct access to the gate of the Power MOSFET (analog driving) ■ Compatible with standard Power MOSFET in compliance with the 2002/95/EC European Directive 2
Contents VNN7NV04P-E, VNS7NV04P-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 4 5 6 2/29 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.
VNN7NV04P-E, VNS7NV04P-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of figures VNN7NV04P-E, VNS7NV04P-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42.
VNN7NV04P-E, VNS7NV04P-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram DRAIN 2 Overvoltage Clamp INPUT 1 Gate Control Linear Current Limiter Over Temperature 3 SOURCE Figure 2. FC01000 Configuration diagram (top view) SO-8 Package(1) SOURCE 1 8 DRAIN SOURCE INPUT DRAIN DRAIN SOURCE 4 5 DRAIN 1. For the pins configuration related to SOT-223 see outlines at page 1.
Electrical specifications 2 VNN7NV04P-E, VNS7NV04P-E Electrical specifications Figure 3. Current and voltage conventions ID VDS DRAIN IIN RIN INPUT SOURCE VIN 2.1 Absolute maximum ratings Table 2.
VNN7NV04P-E, VNS7NV04P-E 2.2 Electrical specifications Thermal data Table 3. Thermal data Value Symbol Parameter Unit SOT-223 Rthj-case Thermal resistance junction-case max Rthj-lead Thermal resistance junction-lead max Rthj-amb Thermal resistance junction-ambient max SO-8 18 °C/W 27 (1) °C/W (1) 96 90 °C/W 1. When mounted on a standard single-sided FR4 board with 0.5 mm2 of Cu (at least 35 µm thick) connected to all DRAIN pins. 2.
Electrical specifications Table 4. Symbol VNN7NV04P-E, VNS7NV04P-E Electrical characteristics (continued) Parameter Test conditions Min Typ Max Unit 100 300 ns 470 1500 ns 500 1500 ns 350 1000 ns 0.75 2.3 µs 4.6 14.0 µs 5.4 16.0 µs 3.6 11.0 µs Switching (Tj = 25 °C, unless otherwise specified) td(on) tr td(off) tf td(on) tr td(off) tf (dI/dt)on Qi Turn-on delay time Rise time Turn-off delay time VDD = 15 V; ID = 3.
VNN7NV04P-E, VNS7NV04P-E 3 Protection features Protection features During normal operation, the input pin is electrically connected to the gate of the internal Power MOSFET through a low impedance path. The device then behaves like a standard Power MOSFET and can be used as a switch from DC up to 50 kHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100µA) flows into the input pin in order to supply the internal circuitry.
Protection features Figure 4. VNN7NV04P-E, VNS7NV04P-E Switching time test circuit for resistive load ID 90% tr tf 10% t td(on) Vgen td(off) t Figure 5. Test circuit for diode recovery times A A D I FAST DIODE OMNIFET S L=100uH B B 150Ω D Rgen VDD I Vgen OMNIFET S 8.
VNN7NV04P-E, VNS7NV04P-E Figure 6. Protection features Unclamped inductive load test circuits Figure 7. Input charge test circuit VIN RGEN VIN PW Figure 8.
Protection features VNN7NV04P-E, VNS7NV04P-E 3.1 Electrical characteristics curves Figure 9. Derating curve Figure 10. Transconductance Gfs (S) 20 18 Vds=13V 16 Tj=-40ºC Tj=25ºC 14 Tj=150ºC 12 10 8 6 4 2 0 0 1 2 3 4 5 6 7 8 Id(A) Figure 11. Static drain-source on resistance vs input voltage (part 1/2) Figure 12. Static drain-source on resistance vs input voltage (part 2/2) Rds(on) (mOhm) Rds(on) (mOhm) 140 120 110 120 Id=3.
VNN7NV04P-E, VNS7NV04P-E Protection features Figure 15. Turn-on current slope (part 1/2) Figure 16. Turn-on current slope (part 2/2) di/dt(A/us) di/dt(A/us) 2.25 8 2 7 Vin=3.5V Vdd=15V Id=3.5A 1.75 Vin=5V Vdd=15V Id=3.5A 6 1.5 5 1.25 4 1 3 0.75 2 0.5 1 0.25 0 100 200 300 400 600 500 700 800 900 1000 1100 200 100 300 400 500 Rg(ohm) 600 700 800 900 1000 1100 Rg(ohm) Figure 17. Transfer characteristics Figure 18.
Protection features VNN7NV04P-E, VNS7NV04P-E Figure 21. Turn-off drain source voltage slope Figure 22. Capacitance variations (part 2/2) C(pF) dv/dt(v/us) 600 300 250 500 f=1MHz Vin=0V Vin=3.5V Vdd=15V Id=3.5A 200 400 150 300 100 200 50 0 100 100 200 300 400 500 600 700 800 900 1000 1100 0 5 10 15 20 25 30 35 Vds(V) Rg(ohm) Figure 23. Output characteristics Figure 24. Normalized on resistance vs temperature v ID(A) Rds(on) 12 2.25 11 2 10 9 Vin=5V Vin=4.
VNN7NV04P-E, VNS7NV04P-E Protection features Figure 27. Normalized input threshold voltage Figure 28. Normalized current limit vs junction vs temperature temperature Vin(th) Ilim (A) 1.15 15 14 1.1 Vds=Vin Id=1mA 1.05 Vds=13V Vin=5V 13 12 1 11 0.95 10 0.9 9 0.85 8 0.8 7 0.75 6 5 0.7 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tj (ºC) T(ºC) Figure 29. Step response current limit Tdlim(us) 7 6.5 Vin=5V Rg=150ohm 6 5.5 5 4.5 4 3.
Protection features 3.2 VNN7NV04P-E, VNS7NV04P-E SO-8 maximum demagnetization energy Figure 30. SO-8 maximum turn-off current versus load inductance ILMAX (A) 100 10 A B C 1 0.1 1 10 100 L(mH) Legend A = Single Pulse at TJstart = 150 °C B = Repetitive pulse at TJstart = 100 °C C = Repetitive Pulse at TJstart = 125 °C Conditions: VCC = 13.5 V Values are generated with RL = 0 Ω.
VNN7NV04P-E, VNS7NV04P-E 3.3 Protection features SOT-223 maximum demagnetization energy Figure 32. SOT-223 maximum turn-off current versus load inductance ILMAX (A) 100 10 1 0.01 0.1 1 10 L(mH) Legend A = Single Pulse at TJstart = 150 °C B = Repetitive pulse at TJstart = 100 °C C = Repetitive Pulse at TJstart = 125 °C Conditions: VCC = 13.5 V Values are generated with RL = 0 Ω.
Package and PCB thermal data VNN7NV04P-E, VNS7NV04P-E 4 Package and PCB thermal data 4.1 SO-8 thermal data Figure 34. SO-8 PC board Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 µm, Copper areas: 0.14 cm2, 0.8 cm2, 2 cm2). Figure 35. Rthj-amb vs PCB copper area in open box free air condition RTHj_amb (ºC/W) SO-8 at 2 pins connected to TAB 110 105 100 95 90 85 80 75 70 0 0.5 1 1.
VNN7NV04P-E, VNS7NV04P-E Package and PCB thermal data Figure 36. SO-8 thermal impedance junction ambient single pulse ZT H (°C /W) 1000 100 10 1 0.1 0.0001 0.001 0.01 0.1 1 T ime (s) 10 100 1000 Figure 37. Thermal fitting model of an OMNIFET II in SO-8 Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb Equation 1 Pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = t p ⁄ T Table 5. SO-8 thermal parameter Area/island (cm2) Footprint R1 (°C/W) 0.
Package and PCB thermal data Table 5. 4.2 VNN7NV04P-E, VNS7NV04P-E SO-8 thermal parameter (continued) Area/island (cm2) Footprint C2 (W.s/°C) 9.00E-04 C3 (W.s/°C) 7.50E-03 C4 (W.s/°C) 0.045 C5 (W.s/°C) 0.35 C6 (W.s/°C) 1.05 2 2 SOT-223 thermal data Figure 38. SOT-223 PC board Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 µm, Copper areas: 0.11 cm2, 1 cm2, 2 cm2). Figure 39.
VNN7NV04P-E, VNS7NV04P-E Package and PCB thermal data Figure 40. SOT-223 thermal impedance junction ambient single pulse ZT H (°C/W) 1000 100 10 1 0.1 0.0001 0.001 0.01 0.1 1 T ime (s) 10 100 1000 Figure 41.
Package and PCB thermal data Table 6. 22/29 VNN7NV04P-E, VNS7NV04P-E SOT-223 thermal parameter Area/island (cm2) Footprint R1 (°C/W) 0.2 R2 (°C/W) 1.1 R3 (°C/W) 4.5 R4 (°C/W) 24 R5 (°C/W) 0.1 R6 (°C/W) 100 C1 (W.s/°C) 3.00E-04 C2 (W.s/°C) 9.00E-04 C3 (W.s/°C) 3.00E-02 C4 (W.s/°C) 0.16 C5 (W.s/°C) 1000 C6 (W.s/°C) 0.
VNN7NV04P-E, VNS7NV04P-E 5 Package and packing information Package and packing information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.1 SOT-223 mechanical data Table 7. SOT-223 mechanical data millimeters Symbol Min. Typ. Max. A 1.8 B 0.6 0.7 0.
Package and packing information 5.2 VNN7NV04P-E, VNS7NV04P-E SO-8 mechanical data Table 8. SO-8 mechanical data mm Dim. Min. Typ. A a1 1.75 0.1 0.25 a2 1.65 a3 0.65 0.85 b 0.35 0.48 b1 0.19 0.25 C 0.25 0.5 c1 45 (typ.) D 4.8 5 E 5.8 6.2 e 1.27 e3 3.81 F 3.8 4 L 0.4 1.27 M 0.6 S L1 24/29 Max. 8 (max.) 0.8 Doc ID 15632 Rev 4 1.
VNN7NV04P-E, VNS7NV04P-E Package and packing information Figure 43.
Package and packing information 5.3 VNN7NV04P-E, VNS7NV04P-E SOT-223 packing information Figure 44. SOT-223 tape and reel shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 12.4 60 18.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb.
VNN7NV04P-E, VNS7NV04P-E 5.4 Package and packing information SO-8 packing information Figure 45. SO-8 tube shipment (no suffix) B C Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) A 100 2000 532 3.2 6 0.6 Figure 46. SO-8 tape and reel shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm.
Revision history 6 VNN7NV04P-E, VNS7NV04P-E Revision history Table 9. 28/29 Document revision history Date Revision Changes 15-Oct-2009 1 Initial release. 26-Oct-2009 2 Updated Figure 43: SO-8 package dimensions. Updated Table 8: SO-8 mechanical data. 05-Jul-2011 3 Table 4: Electrical characteristics: – RDS(on): updated maximum values – td(on), tr, td(off), tf: updated min, typ and max values 18-Sep-2013 4 Updated Disclaimer.
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