Datasheet

SPI operation (SEL2 = H) VNI8200XP
24/40 DocID15234 Rev 6
10 SPI operation (SEL2 = H)
10.1 8-bit SPI mode (SEL1 = L)
If SEL2 = H, the 8-bit SPI mode is based on an 8-bit command frame sent from the
microcontroller to the IC; each bit directly drives the corresponding output where LSB drives
output 0 and MSB drives output 7. Each bit, set to ‘1’, activates (closes) the corresponding
output.
At the same time, the IC transfers the channel fault conditions (OVT) to the microcontroller.
These fault conditions are latched at the occurrence and cleared after each communication
(each time the SS
signal has a positive transition). Each bit, set to ‘1’, indicates an OVT
condition for the corresponding channel.
10.2 16-bit SPI mode (SEL1 = H)
The 16-bit SPI mode is based on a 16-bit command frame sent from the microcontroller to
the IC; the first 8 bits directly drive the output channels (each bit, set to ‘1’, activates the
corresponding output), the other 8 bits contain a 4-bit parity check code where the last bit
(the inversion of the previous one) is used to detect a communication error condition
(providing at least a transition in each frame):
P0 = IN0 ⊕ IN1 ⊕ IN2 ⊕ IN3 ⊕ IN4 ⊕ IN5 ⊕ IN6 ⊕ IN7
P1 = IN1 ⊕ IN3 ⊕ IN5 ⊕ IN7
P2 = IN0 ⊕ IN2 ⊕ IN4 ⊕ IN6
nP0 = NOT P0
At the same time, the IC transfers to the microcontroller a 16-bit fault frame where the first 8
bits indicate a channel fault (OVT) condition (each bit, set to ‘1’, indicates an OVT event),
the following 4 bits provide general fault condition information. FB_OK: this bit is related to
the DC-DC regulation: at the DC-DC turn-on, this bit is low and becomes high after FB rises
above 90% of the nominal V
FB
voltage and a correct SPI communication occurred. If the FB
Table 15. Command 8-bit frame (master to slave)
MSB LSB
IN7 IN6 IN5 IN4 IN3 IN2 IN1 IN0
Table 16. Fault 8-bit frame (slave to master)
MSB LSB
F7 F6 F5 F4 F3 F2 F1 F0
Table 17. Command 16-bit frame (master to slave)
MSB LSB
IN7 IN6 IN5 IN4 IN3 IN2 IN1 IN0 - - - - P2 P1 P0 nP0