Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsPMICsPMIC - ELCs High side PowerSSO 12

November 2011 Doc ID 15187 Rev 8 1/23

VNI2140J

Dual high side smart power solid state relay

Features

■ Nominal current: 0.5 A per channel

■ Shorted load protections

■ Junction overtemperature protection

■ Case overtemperature protection for thermal

independence of the channels

■ Thermal case shutdown restart not

simultaneous for the various channels

■ Protection against loss of ground

■ Current limitation 1 A per channel

■ Undervoltage shutdown

■ Open load in off-state and short to V

detection

■ Open-drain diagnostic outputs

■ 3.3 V CMOS/TTL compatible inputs

■ Fast demagnetization of inductive loads

■ Conforms to IEC 61131-2

Description

The VNI2140J is a monolithic device designed

using STMicroelectronics' VIPower technology.

The device drives two independent resistive or

inductive loads with one side connected to

ground. Active current limitation prevents a drop

in system power supply in cases of shorted-load,

and built-in thermal shutdown protects the chip

from damage due to over-temperature and short-

circuit. In overload conditions, channel turns OFF

and ON automatically to maintain the junction

temperature between TTSD and TR. If the case

temperature reaches TCSD, the overloaded

channel is turned OFF and restarts only when

case temperature decreases down to TCR. In

order to avoid high-peak current from the supply,

when more than one channel is overloaded the

TCSD restart is not simultaneous. Non

overloaded channels continue to operate

normally. The open-drain diagnostics output

indicates over-temperature conditions and open-

load in off state.

Type V

demag

(1)

1. Per channel

DSon

(1)

out

(1)

VNI2140J V

-45 V 0.08 Ω 1 A

(2)

2. Current limitation

45 V

PowerSSO-12

Table 1. Device summary

Order codes Package Packaging

VNI2140J

PowerSSO-12

Tube

VNI2140JTR Tape and reel

www.st.com

Summary of content (23 pages)

PAGE 1
VNI2140J Dual high side smart power solid state relay Features Type VNI2140J Vdemag(1) RDSon(1) VCC-45 V 0.08 Ω Iout(1) VCC 1 A (2) 45 V 1. Per channel PowerSSO-12 2. Current limitation Description ■ Nominal current: 0.
PAGE 2
Contents VNI2140J Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . .
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VNI2140J 1 Block diagram Block diagram Figure 1.
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Pin connections 2 VNI2140J Pin connections Figure 2. Pin connections (top view) NC Input 1 Diag 1 GND Diag 2 Input 2 Table 2. 4/23 VCC Output 1 Output 1 Output 2 Output 2 VCC Pin description n° Name Description 1 NC 2 Input 1 Channel 1 input 3.3 V CMOS/TTL compatible 3 Diag 1 Channel 1 diagnostic in open-drain configuration 4 GND 5 Diag 2 Channel 2 diagnostic in open-drain configuration 6 Input 2 Channel 2 input 3.
PAGE 5
VNI2140J 3 Maximum ratings Maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Unit 45 V VCC Power supply voltage -VCC Reverse supply voltage -0.3 V IGND DC ground reverse current -250 mA IOUT Output current (continuous) Internally limited A -5 A IR Reverse output current (per channel) IIN Input current (per channel) ± 10 mA VIN Input voltage +VCC V VDIAG Diag pin voltage +VCC V IDIAG Diag pin current ± 10 mA VESD Electrostatic discharge (R = 1.
PAGE 6
Electrical characteristics 4 VNI2140J Electrical characteristics 9 V < VCC < 36 V; -40 °C < TJ < 125 °C; unless otherwise specified Table 5. Symbol Vcc Power section Parameter Test conditions Supply voltage Min. Typ. 9 Max. Unit 45 V 0.150 Ω Ω 52 V 4 µA mA 0.080 RDS(ON) On-state resistance IOUT = 0.5 A at TJ = 25 °C IOUT = 0.
PAGE 7
VNI2140J Electrical characteristics Table 7. Logical input Symbol Parameter VIL Input low level voltage VIH Input high level voltage VI(HYST) IIN Table 8. Symbol VDIAG (1) Test conditions Min. V V V 10 VIN = 36 V 210 μA Protection and diagnostic Parameter Diag voltage output low Test conditions Min. Typ. IDIAG = 1.5 mA (fault condition) 7 VUSDHYS Undervoltage hysteresis 0.
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Electrical characteristics Figure 3.
PAGE 9
VNI2140J 5 Truth table Truth table Table 9. Truth table INPUTn OUTPUTn DIAGn Normal operation L H L H H H Overtemperature L H L L H L Undervoltage L H L L X X Shorted load (Current limitation) L H L X H H Output voltage > VOL L H Z (1) H L H Short to VCC L H H H L H 1.
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Switching waveforms 6 Switching waveforms Figure 4.
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VNI2140J Switching waveforms Figure 5. Switching waveforms (continued) Figure 6.
PAGE 12
Switching waveforms Figure 7.
PAGE 13
VNI2140J 7 Open load Open load In order to detect the open load fault a pull-up resistor must be connected between the VCC line and the output pin. In a normal condition a current flows through the network made up of a pull-up resistor and a load. The voltage across the load is less than VOLMIN; so the diag pin is kept high.
PAGE 14
Open load VNI2140J Figure 9.
PAGE 15
VNI2140J 8 Package and PCB thermal data Package and PCB thermal data Figure 10. PowerSSO-12 PC board Figure 11. RthJA vs PCB copper area in open box free air condition Figure 12.
PAGE 16
Package and PCB thermal data VNI2140J Pulse calculation formula Equation 4 ZTHδ = RTH x δ + ZTHtp (1 – δ) where δ = tP/T Figure 13. Thermal fitting model of a double channel HSD in PowerSSO-12 Table 10. 16/23 Thermal parameter Area/island (cm2) Footprint 2 8 R1 (°C/W) 0.1 R2 (°C/W) 0.2 R3 (°C/W) 7 R4 (°C/W) 10 10 9 R5 (°C/W) 22 15 10 R6 (°C/W) 26 20 15 C1 (W.s/°C) 0.0001 C2 (W.s/°C) 0.002 C3 (W.s/°C) 0.05 C4 (W.s/°C) 0.2 0.1 0.1 C5 (W.s/°C) 0.27 0.8 1 C6 (W.
PAGE 17
VNI2140J 9 Reverse polarity protection Reverse polarity protection This schematic can be used with any type of load. The following is an indication on how to dimension the RGND resistor. RGND = (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet.
PAGE 18
Package mechanical data 10 VNI2140J Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
PAGE 19
VNI2140J Package mechanical data Table 11. PowerSSO-12™ mechanical data mm Symbol Min. Typ. Max. A 1.250 1.620 A1 0.000 0.100 A2 1.100 1.650 B 0.230 0.410 C 0.190 0.250 D 4.800 5.000 E 3.800 4.000 e 0.800 H 5.800 6.200 h 0.250 0.500 L 0.400 1.270 k 0° 8° X 1.900 2.500 Y 3.600 4.200 ddd 0.100 Figure 15.
PAGE 20
Package mechanical data VNI2140J Figure 16. PowerSSO-12™ tube shipment (no suffix) Figure 17.
PAGE 21
VNI2140J Package mechanical data Figure 18.
PAGE 22
Revision history 11 VNI2140J Revision history Table 12.
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VNI2140J Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.