Datasheet
Table Of Contents
- 1 Block diagram and pin description
- 2 Electrical specifications
- Figure 3. Current and voltage conventions
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- Table 5. Power section
- Table 6. Switching (VCC = 24 V; Tj = 25 C)
- Table 7. Logic inputs
- Figure 4. Treset definition
- Figure 5. Tstby definition
- Table 8. Protections and diagnostics
- Table 9. Current sense (8 V < VCC < 36 V)
- Table 10. Openload detection (VFR_Stby = 5 V)
- Figure 6. Current sense delay characteristics
- Figure 7. Openload off-state delay timing
- Figure 8. Switching characteristics
- Figure 9. Output stuck to VCC detection delay time at FRSTBY activation
- Figure 10. Delay response time between rising edge of ouput current and rising edge of current sense
- Figure 11. Output voltage drop limitation
- Figure 12. Device behavior in overload condition
- Table 11. Truth table
- Table 12. Electrical transient requirements (part 1)
- Table 13. Electrical transient requirements (part 2)
- Table 14. Electrical transient requirements (part 3)
- 2.4 Electrical characteristics curves
- Figure 13. Off-state output current
- Figure 14. High-level input current
- Figure 15. Input clamp voltage
- Figure 16. High-level input voltage
- Figure 17. Low-level input voltage
- Figure 18. Input hysteresis voltage
- Figure 19. On-state resistance vs Tcase
- Figure 20. On-state resistance vs VCC
- Figure 21. ILIMH vs Tcase
- Figure 22. Turn-on voltage slope
- Figure 23. Turn-off voltage slope
- 3 Application information
- 4 Package and PCB thermal data
- 4.1 PowerSSO-24 thermal data
- Figure 26. PowerSSO-24 PC board
- Figure 27. Rthj-amb vs PCB copper area in open box free air condition (one channel ON)
- Figure 28. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON)
- Figure 29. Thermal fitting model of a double channel HSD in PowerSSO-24
- Table 15. Thermal parameters
- 4.1 PowerSSO-24 thermal data
- 5 Package and packing information
- 6 Order codes
- 7 Revision history
Package and PCB thermal data VND5T035AK-E
24/31 Doc ID 018942 Rev 5
Figure 28. PowerSSO-24 thermal impedance junction ambient single pulse (one
channel ON)
Figure 29. Thermal fitting model of a double channel HSD in PowerSSO-24
1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered
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