Datasheet

Electrical specifications VND5E160AJ-E
12/37
t
DSENSE1H
Delay response
time from falling
edge of CS_DIS
pin
V
SENSE
<4V, 0.08A<Iout<1.5A
I
SENSE
=90% of I
SENSE
max
(see Figure 4.)
40 100 µs
t
DSENSE1L
Delay response
time from rising
edge of CS_DIS
pin
V
SENSE
<4V, 0.08A<Iout<1.5A
I
SENSE
=10% of I
SENSE
max
(see Figure 4.)
520µs
t
DSENSE2H
Delay response
time from rising
edge of INPUT pin
V
SENSE
<4V, 0.08A<Iout<1.5A
I
SENSE
=90% of I
SENSE
max
(see Figure 4.)
30 150 µs
t
DSEN
SE
2H
Delay response
time between rising
edge of output
current and rising
edge of current
sense
V
SENSE
<4V,
I
SENSE
=90% of I
SENSEMAX,
I
OUT
= 90% of I
OUTMAX
I
OUTMAX
= 1.5A (see Figure 7)
110
µ
s
t
DSENSE2L
Delay response
time from falling
edge of INPUT pin
V
SENSE
<4V, 0.08A<Iout<1.5A
I
SENSE
=10% of I
SENSE
max
(see Figure 4.)
80 250 µs
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open load OFF state detection.
Table 10. Openload detection (8V<V
CC
<18V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
OL
Openload Off state
voltage detection
threshold
V
IN
= 0 V 2
See
Figure 5
4V
t
DSTKON
Output short circuit to
V
CC
detection delay at
turn Off
See Figure 5 180 1200 µs
I
L(off2)r
Off state output current
at V
OUT
= 4V
V
IN
=0V; V
SENSE
=0V
V
OUT
rising from 0V to 4V
-120 0 µA
I
L(off2)f
Off state output current
at V
OUT
= 2V
V
IN
=0V; V
SENSE
=V
SENSEH
V
OUT
falling from V
CC
to 2V
-50 90 µA
td_vol
Delay response from
output rising edge to
V
SENSE
rising edge in
open-load
V
OUT
= 4 V; V
IN
= 0V
V
SENSE
= 90% of V
SENSEH
20 µs
Table 9. Current sense (8V<VCC<18V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit