Datasheet

Application information VND5E006ASP-E
24/37 DocID17362 Rev 6
3 Application information
Figure 32. Application schematic
Note: Channel 2 has the same internal circuit as channel 1.
3.1 Load dump protection
D
ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line
that are greater than the ones shown in the ISO 7637-2 2004 (E) table.
3.2 MCU I/Os protection
When negative transients are present on the V
CC
line, the control pins are pulled negative to
approximately -1.5 V. ST suggests to insert a resistor (R
prot
) in line to prevent the
microcontroller
I/O pins from latching-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
Equation 1
-V
CCpeak
/I
latchup
≤ R
prot
≤ (V
OHμC
- V
IH
) / I
IHmax
Calculation example:
For V
CCpeak
= -1.5 V and I
latchup
≥ 20 mA; V
OHμC
≥ 4.5 V
75 Ω ≤ R
prot
≤ 240 kΩ.
Recommended values: R
prot
= 10 kΩ, C
EXT
= 10 nF .
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