Datasheet

VND5050J-E / VND5050K-E Electrical specifications
Doc ID 12266 Rev 7 11/37
Figure 4. Status timings
Table 11. Logic input
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL
Input low level 0.9 V
I
IL
Low level input current V
IN
=0.9 V 1 µA
V
IH
Input high level 2.1 V
I
IH
High level input current V
IN
= 2.1 V 10 µA
V
I(hyst)
Input hysteresis voltage 0.25 V
V
ICL
Input clamp voltage
I
IN
= 1mA
I
IN
= -1mA
5.5
-0.7
7V
V
V
SDL
STAT_DIS low level
voltage
0.9 V
I
SDL
Low level STAT_DIS
current
V
SD
= 0.9 V 1 µA
V
SDH
STAT_DIS high level
voltage
2.1 V
I
SDH
High level STAT_DIS
current
V
SD
= 2.1 V 10 µA
V
SD(hyst)
STAT_DIS hysteresis
voltage
0.25 V
V
SDCL
STAT_DIS clamp voltage
I
SD
= 1mA
I
SD
= -1mA
5.5
-0.7
7V
V
V
IN
V
STAT
t
POL
OPEN LOAD STATUS TIMING (without external pull-up)
I
OUT
< I
OL
V
OUT
< V
OL
t
DOL(on)
V
IN
V
STAT
OPEN LOAD STATUS TIMING (with external pull-up)
I
OUT
< I
OL
V
OUT
> V
OL
t
DOL(on)
V
IN
V
STAT
OVER TEMP STATUS TIMING
t
SDL
t
SDL
T
j
> T
TSD
V
IN
V
STAT
t
DSTKON
OUTPUT STUCK TO V
CC
I
OUT
> I
OL
V
OUT
> V
OL
t
DOL(on)