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September 2013 Doc ID 12285 Rev 8 1/31

VND5012AK-E

Double channel high side driver with analog current sense

for automotive applications

Features

■

General features

– Inrush current active management by

power limitation

– Very low standby current

– 3.0 V CMOS compatible input

– Optimized electromagnetic emission

– Very low electromagnetic susceptibility

– In compliance with the 2002/95/EC

european directive

■

Diagnostic functions

– Proportional load current sense

– High current sense precision for wide range

currents

– Current sense disable

– Thermal shutdown indication

– Very low current sense leakage

■

Protections

– Undervoltage shutdown

– Overvoltage clamp

– Output stuck to Vcc detection

– Load current limitation

– Self limiting of fast thermal transients

– Protection against loss of ground and loss

of V

– Thermal shutdown

– Reverse battery protection (see Application

schematic)

– Electrostatic discharge protection

Application

■

All types of resistive, inductive and capacitive

loads

Description

The VND5012AK-E a monolithic device made

using STMicroelectronics VIPower M0-5

technology. It is intended for driving resistive or

inductive loads with one side connected to

ground. Active V

pin voltage clamp protects the

device against low energy spikes (see ISO7637

transient compatibility table). This device

integrates an analog current sense which delivers

a current proportional to the load current

(according to a known ratio) when CS_DIS is

driven low or left open. When CS_DIS is driven

high, the CURRENT SENSE pin is in a high

impedance condition. Output current limitation

protects the device in overload condition. In case

of long overload duration, the device limits the

dissipated power to safe level up to thermal

shutdown intervention. Thermal shutdown with

automatic restart allows the device to recover

normal operation as soon as fault condition

disappears.

Max supply voltage V

41 V

Operating voltage range V

4.5 to 36 V

Max on-state resistance (per ch.) R

12 m

Current limitation (typ) I

LIMH

60 A

Off-state supply current (typ.) I

2µA

(1)

1. Typical value with all loads connected.

PowerSSO-24

Table 1. Device summary

Package

Order codes

Tube Tape and reel

PowerSSO-24 VND5012AK-E VND5012AKTR-E

www.st.com

Summary of content (31 pages)

PAGE 1
VND5012AK-E Double channel high side driver with analog current sense for automotive applications Features Max supply voltage VCC 41 V Operating voltage range VCC 4.5 to 36 V Max on-state resistance (per ch.) RON 12 mΩ Current limitation (typ) ILIMH 60 A IS 2 µA(1) Off-state supply current (typ.) 1. Typical value with all loads connected. ■ General features – Inrush current active management by power limitation – Very low standby current – 3.
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Contents VND5012AK-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . .
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VND5012AK-E List of tables List of tables Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . .
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List of figures VND5012AK-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. 4/31 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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VND5012AK-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram VCC UNDERVOLTAGE VCC CLAMP OUTPUT1 PwCLAMP 1 GND CURRENT SENSE1 DRIVER 1 ILIM 1 INPUT1 LOGIC VDSLIM 1 PwrLIM 1 PwCLAMP 2 DRIVER 2 OUTPUT2 ILIM 2 OVERTEMP. 1 INPUT2 VDSLIM 2 IOUT1 K1 CURRENT SENSE2 OVERTEMP. 2 IOUT2 K2 PwrLIM 2 CS_DIS Table 2. Pin function Name VCC OUTPUT1,2 GND INPUT1,2 CURRENT SENSE1,2 CS_DIS Function Battery connection. Power output. Ground connection.
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Block diagram and pin description Figure 2. VND5012AK-E Configuration diagram (top view) VCC GND N.C. INPUT2 N.C. INPUT1 N.C. CURRENT SENSE1 N.C. CURRENT SENSE2 CS_DIS VCC 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 TAB = VCC Table 3. 6/31 Suggested connections for unused and not connected pins Connection / pin Current Sense N.C.
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VND5012AK-E 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions IS VCC ICSD OUTPUT1 CS_DIS VCSD CURRENT SENSE1 IIN1 INPUT1 VIN1 IIN2 VIN2 OUTPUT2 VF (*) IOUT1 VOUT1 ISENSE1 VSENSE1 IOUT2 VOUT2 INPUT2 GND CURRENT SENSE2 VCC ISENSE2 VSENSE2 IGND Note: VFn = VOUTn - VCC during reverse battery condition. 2.
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Electrical specifications Table 4. Absolute maximum ratings (continued) Symbol Value Unit 508 mJ Maximum switching energy (L=1.25 mH; RL=0 Ω; Vbat=13.5 V; Tjstart=150 °C; IOUT = IlimL(Typ.)) VESD Electrostatic discharge (Human body model: R= 1.
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VND5012AK-E 2.3 Electrical specifications Electrical characteristics 8V
PAGE 10
Electrical specifications Table 8. Symbol VND5012AK-E Logic inputs Parameter Test conditions VIL Input low level voltage IIL Low level input current VIH Input high level voltage IIH High level input current VI(hyst) Input hysteresis voltage VICL VIN=0.9 V CS_DIS low level voltage ICSDL Low level CS_DIS current VCSD=0.9 V VCSDH CS_DIS high level voltage ICSDH High level CS_DIS current VCSD=2.1 V VCSCL Table 9.
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VND5012AK-E Electrical specifications Table 10. Symbol K0 K1 dK1/K1(1) K2 dK2/K2(1) K3 dK3/K3(1) ISENSE0 Current sense (8V
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Electrical specifications Table 10. Symbol VND5012AK-E Current sense (8V
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VND5012AK-E Electrical specifications Figure 5.
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Electrical specifications Figure 6. VND5012AK-E IOUT/ISENSE vs IOUT 7000 6500 max Tj = -40°C to 150°C 6000 5500 max Tj= 25°C to 150°C typical value 5000 min Tj= 25°C to 150°C 4500 4000 min Tj= -40°C to 150°C 3500 3000 5 Figure 7. 10 15 20 25 Maximum current sense ratio drift vs load current dk/k(%) 15 10 5 0 -5 -10 -15 5 10 15 IOUT (A) Note: Parameter guaranteed by design; it is not tested.
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VND5012AK-E Electrical specifications Table 11. Truth table Input Output Sense (VCSD=0V)(1) Normal operation L H L H 0 Nominal Over temperature L H L L 0 VSENSEH Undervoltage L H L L 0 0 Short circuit to GND (Rsc ≤ 10 mΩ) L H H L L L 0 0 if Tj < TTSD VSENSEH if Tj > TTSD Short circuit to VCC L H H H 0 < Nominal Negative output voltage clamp L L 0 Conditions 1.
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Electrical specifications Figure 9. VND5012AK-E Output voltage drop limitation Vcc-Vout Tj=150oC Tj=25oC Tj=-40oC Von Iout Von/Ron(T) Table 12. ISO 7637-2: 2004(E) Electrical transient requirements (part 1/3) Test levels(1) test pulse III IV 1 -75V -100V 2a +37V 3a Number of pulses or test times Burst cycle/pulse repetition time Min. Max. 5000 pulses 0.5 s 5s 2 ms, 10 Ω +50V 5000 pulses 0.2 s 5s 50 µs, 2 Ω -100V -150V 1h 90 ms 100 ms 0.
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VND5012AK-E Electrical specifications Table 14. Electrical transient requirements (part 3/3) Class Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. Figure 10.
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Electrical specifications VND5012AK-E 2.4 Electrical characteristics curves Figure 11. Off-state output current Figure 12. High level input current Figure 13. Input clamp voltage Figure 14. Input high level Figure 15. Input low level Figure 16.
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VND5012AK-E Electrical specifications Figure 17. On-state resistance vs Tcase Figure 18. On-state resistance vs VCC Figure 19. Undervoltage shutdown Figure 20. ILIMH vs Tcase Figure 21. Turn-on voltage slope Figure 22.
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Electrical specifications Figure 23. CS_DIS high level voltage VND5012AK-E Figure 24. CS_DIS clamp voltage Figure 25.
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VND5012AK-E 3 Application information Application information Figure 26. Application schematic +5V VCC Rprot CS_DIS Dld μC Rprot INPUT OUTPUT Rprot CURRENT SENSE GND RSENSE VGND Cext RGND DGND Note: Channel 2 has the same internal circuit as channel 1. 3.1 GND Protection network against reverse battery 3.1.1 Solution 1: resistor in the ground line (RGND only) This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1.
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Application information VND5012AK-E If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 3.1.2 Solution 2: diode (DGND) in the ground line A resistor (RGND=1 kΩ) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs.
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VND5012AK-E 3.4 Application information Maximum demagnetization energy (VCC = 13.5V) Figure 27. Maximum turn-off current versus inductance (for each channel) 100 A B C I (A) 10 1 0,1 1 L (mH) 10 100 A: Tjstart = 150°C single pulse B: Tjstart = 100°C repetitive pulse C: Tjstart = 125°C repetitive pulse VIN, IL Demagnetization Demagnetization Demagnetization t Note: Values are generated with RL =0 Ω.
PAGE 24
Package and PCB thermal data VND5012AK-E 4 Package and PCB thermal data 4.1 PowerSSO-24 thermal data Figure 28. PowerSSO-24 PC board Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77 mm x 86 mm,PCB thickness=1.6 mm, Cu thickness=70 µm (front and back side), Copper areas: from minimum pad layout to 8 cm2). Figure 29.
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VND5012AK-E Package and PCB thermal data Figure 30. PowerSSO-24 thermal impedance junction ambient single pulse (one channel on) ZTH (° C/ W) 100 foot print 2 cm2 8 cm2 10 1 0,1 0,0001 0,001 0,01 0,1 1 Time ( s) 10 100 1000 Equation 1: pulse calculation formula Z THδ = R TH ⋅δ+Z THtp (1 – δ) where δ = tP/T Figure 31. Thermal fitting model of a single channel HSD in PowerSSO-24(a) a.
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Package and PCB thermal data Table 15. 26/31 VND5012AK-E Thermal parameter Area/island (cm2) Footprint R1 (°C/W) 0.1 R2 (°C/W) 0.3 R3 (°C/W) 6 R4 (°C/W) 7.7 R5 (°C/W) 2 8 9 9 8 R6 (°C/W) 28 17 10 R7 (°C/W) 0.1 R8 (°C/W) 0.3 C1 (W.s/°C) 0.0025 C2 (W.s/°C) 0.0024 C3 (W.s/°C) 0.025 C4 (W.s/°C) 0.75 C5 (W.s/°C) 1 4 9 C6 (W.s/°C) 2.2 5 17 C7 (W.s/°C) 0.0025 C8 (W.s/°C) 0.
PAGE 27
VND5012AK-E Package and packing information 5 Package and packing information 5.1 ECOPACK® packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.2 PowerSSO-24 package mechanical data Figure 32. PowerSSO-24 package dimensions Table 16.
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Package and packing information Table 16. VND5012AK-E PowerSSO-24 mechanical data (continued) Millimeters Symbol Min. Typ. Max. c 0.23 0.32 D 10.10 10.50 E 7.4 7.6 e 0.8 e3 8.8 G 0.1 G1 0.06 H 10.1 10.5 h 0.4 L 0.55 0.85 N 5.3 10deg X 4.1 4.7 Y 6.5 7.1 PowerSSO-24 packing information Figure 33. PowerSSO-24 tube shipment (no suffix) C B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) All dimensions are in mm. A 28/31 Doc ID 12285 Rev 8 49 1225 532 3.5 13.
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VND5012AK-E Package and packing information Figure 34. PowerSSO-24 tape and reel shipment (suffix “TR”) Reel dimensions Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) 1000 1000 330 1.5 13 20.2 24.4 100 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.05) D1 (min) F (± 0.1) K (max) P1 (± 0.
PAGE 30
Revision history 6 VND5012AK-E Revision history Table 17. Document revision history Date Revision 10-Apr-2006 1 Initial release. 2 Document reformatted and restructured. Added lists of tables and figures. Added ECOPACK® packages information. Table 4: Absolute maximum ratings: updated EMAX entries. Table 10: Current sense (8V
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VND5012AK-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.