Datasheet

Application information VN5E010AH
24/37 Doc ID 15984 Rev 3
3 Application information
Figure 32. Application schematic
3.1 Load dump protection
D
ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line
that are greater than the ones shown in the ISO 7637-2 2004 (E) table.
3.2 MCU I/Os protection
When negative transients are present on the V
CC
line, the control pins is pulled negative to
approximatly -1.5 V. ST suggests to insert a resistor (R
prot
) in line to prevent the
microcontroller I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of
microcontroller I/Os.
Equation 1
-V
CCpeak
/ I
latchup
 R
prot
 (V
OHC
- V
IH
) / I
IHmax
Calculation example:
For V
CCpeak
= - 1.5 V; I
latchup
 20 mA; V
OHC
 4.5 V
75   R
prot
 240 k.
Recommended values: R
prot
=10 kC
EXT
=10 nF.
V
CC
GND
OUT
+5V
CS_DIS
IN
R
prot
R
prot
20V
D
ld
R
prot
R
SENSE
CS
MCU
45V
C
ext