Datasheet

VN5050J-E Electrical specifications
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Table 10. Openload detection
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
OL
Openload On State
detection threshold
V
IN
= 5V ,8V<V
CC
<18V 10
See
Figure 18
50 mA
t
DOL(on)
Openload On State
detection delay
I
OUT
= 0A, V
CC
=13V
(see Figure 4)
200 µs
t
POL
Delay between INPUT
falling edge and STATUS
rising edge in Openload
condition
I
OUT
= 0A (see Figure 4) 200 500 1000 µs
V
OL
Openload Off State
voltage detection
threshold
V
IN
= 0V, 8V<V
CC
<16V 2
See
Figure 19
4V
t
DSTKON
Output short circuit to
V
CC
detection delay at
turn Off
See Figure 4 180 t
POL
µs
Table 11. Logic input
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL
Input low level 0.9 V
I
IL
Low level Input current V
IN
=0.9 V 1 µA
V
IH
Input high level 2.1 V
I
IH
High level Input current V
IN
= 2.1 V 10 µA
V
I(hyst)
Input hysteresis voltage 0.25 V
V
ICL
Input clamp voltage
I
IN
= 1mA
I
IN
= -1mA
5.5
-0.7
7V
V
V
SDL
STAT_DIS low level
voltage
0.9 V
I
SDL
Low level STAT_DIS
current
V
SD
= 0.9 V 1 µA
V
SDH
STAT_DIS high level
voltage
2.1 V
I
SDH
High level STAT_DIS
current
V
SD
= 2.1 V 10 µA
V
SD(hyst)
STAT_DIS hysteresis
voltage
0.25 V
V
SDCL
STAT_DIS clamp voltage
I
SD
=1mA
I
SD
=-1mA
5.5
-0.7
7V
V