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September 2013 Rev 4 1/31

VN5050J-E

Single channel high side driver

for automotive applications

Features

■ Main

– Inrush current active management by

power limitation

– Very low stand-by current

– 3.0V CMOS compatible input

– Optimized electromagnetic emission

– Very low electromagnetic susceptibility

– In compliance with the 2002/95/EC

European directive

■ Diagnostic functions

– Open drain status output

– On state open load detection

– Off state open load detection

– Thermal shutdown indication

■ Protections

– Undervoltage shut-down

– Overvoltage clamp

– Output stuck to V

detection

– Load current limitation

– Self limiting of fast thermal transients

– Protection against loss of ground and loss

of V

– Thermal shut down

– Reverse battery protection (see Figure 27)

– Electrostatic discharge protection

Application

■ All types of resistive, inductive and capacitive

loads

Description

The VN5050J-E is a monolithic device made

using STMicroelectronics VIPower technology. It

is intended for driving resistive or inductive loads

with one side connected to ground. Active V

voltage clamp protects the device against low

energy spikes (see ISO7637 transient

compatibility table). The device detects open load

condition both in on and off state, when STAT_DIS

is left open or driven low. Output shorted to V

detected in the off state.

When STAT_DIS is driven high, the STATUS pin

is in a high impedance condition.Output current

limitation protects the device in overload

condition. In case of long duration overload, the

device limits the dissipated power to safe level up

to thermal shut-down intervention.Thermal shut-

down with automatic restart allows the device to

recover normal operation as soon as fault

condition disappears.

Max supply voltage V

41V

Operating voltage range V

4.5 to 36V

Max On-State resistance (per ch.)

50 m

Current limitation (typ) I

LIMH

19 A

Off state supply current I

2 µA

(1)

(1) Typical value with all loads connected.

PowerSSO-12

Table 1. Device summary

Package

Order codes

Tube Tape & Reel

PowerSSO-12 VN5050J-E VN5050JTR-E

www.st.com

Summary of content (31 pages)

PAGE 1
VN5050J-E Single channel high side driver for automotive applications Features Max supply voltage VCC 41V Operating voltage range VCC 4.5 to 36V Max On-State resistance (per ch.) RON 50 m Current limitation (typ) ILIMH 19 A Off state supply current IS 2 µA(1) PowerSSO-12 Application (1) Typical value with all loads connected. ■ ■ ■ Main – Inrush current active management by power limitation – Very low stand-by current – 3.
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Contents VN5050J-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . .
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VN5050J-E List of tables List of tables Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . .
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List of figures VN5050J-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. 4/31 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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VN5050J-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram VCC VCC CLAMP UNDERVOLTAGE PwCLAMP GND DRIVER OUTPUT ILIM INPUT VDSLIM LOGIC STATUS OPENLOAD ON OPENLOAD OFF STAT_DIS OVERTEMP. PwrLIM Table 2. Pin function Name VCC OUTPUT GND INPUT STATUS STAT_DIS Function Battery connection. Power output. Ground connection. Must be reverse battery protected by an external diode/resistor network.
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Block diagram and pin description Figure 2. VN5050J-E Configuration diagram (top view) TAB = Vcc N.C. GND INPUT STATUS_DIS STATUS N.C. 12 11 10 9 8 7 1 2 3 4 5 6 N.C. OUTPUT OUTPUT OUTPUT OUTPUT N.C. PowerSSO-12 Note: The above pin configuration reflects the changes notified with PCN-APG-BOD/07/2886. The new pinout is backaward compatible with existing PCB layouts where pins #1 and #6 are connected to Vcc and/or pins #7 and 12 are connected to OUTPUT.
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VN5050J-E 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions IS VCC VCC VF ISD IOUT STAT_DIS OUTPUT VSD VOUT IIN ISTAT INPUT STATUS VIN VSTAT GND IGND Note: VF = VOUT - VCC during reverse battery condition. 2.1 Absolute maximum ratings Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device.
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Electrical specifications Table 4. Absolute maximum ratings (continued) Symbol Value Unit 750 V Junction operating temperature -40 to 150 °C Storage temperature - 55 to 150 °C Electrostatic discharge (Human Body Model: R=1.5K C=100pF) VESD Charge device model (CDM-AEC-Q100-011) Tstg Thermal data Table 5. Symbol 8/31 Parameter VESD Tj 2.2 VN5050J-E Thermal data Parameter Rthj-case Thermal resistance junction-case (Max.
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VN5050J-E 2.3 Electrical specifications Electrical characteristics Values specified in this section are for 8V
PAGE 10
Electrical specifications Table 8. Symbol VN5050J-E Status pin (VSD=0V) Parameter Test conditions Min. Typ. Max. Unit VSTAT Status low output voltage ISTAT= 1.6 mA, VSD=0V 0.5 V ILSTAT Status leakage current Normal Operation or VSD=5V,  VSTAT= 5V 10 µA CSTAT Status pin input capacitance Normal Operation or VSD=5V,  VSTAT= 5V 100 pF VSCL Status clamp voltage ISTAT= 1mA ISTAT= -1mA 7 V V Table 9.
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VN5050J-E Electrical specifications Table 10. Symbol Openload detection Parameter Test conditions Min. Typ. Max. Unit 10 See Figure 18 50 mA 200 µs IOL Openload On State detection threshold VIN = 5V ,8V
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Electrical specifications Figure 4. VN5050J-E Status timings OPEN LOAD STATUS TIMING (without external pull-up) IOUT < IOL VIN VOUT < VOL OPEN LOAD STATUS TIMING (with external pull-up) IOUT < IOL VIN VOUT > VOL VSTAT VSTAT tDOL(on) tDOL(on) tPOL OVER TEMP STATUS TIMING OUTPUT STUCK TO VCC Tj > TTSD IOUT > IOL VIN VOUT > VOL VSTAT VSTAT tDOL(on) Truth Table VIN Table 12.
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VN5050J-E Electrical specifications Figure 5. Switching characteristics VOUT tWon tWoff 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% tr tf t INPUT td(on) td(off) t Figure 6.
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Electrical specifications Table 13. VN5050J-E Electrical transient requirements ISO 7637-2: 2004(E) Test levels Test pulse III IV Number of pulses or test times 1 -75V -100V 5000 pulses 0.5 s 5s 2 ms, 10  2a +37V +50V 5000 pulses 0.2 s 5s 50 µs, 2  3a -100V -150V 1h 90 ms 100 ms 0.1 µs, 50  3b +75V +100V 1h 90 ms 100 ms 0.1 µs, 50  4 -6V -7V 1 pulse 100 ms, 0.
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VN5050J-E Electrical specifications Figure 7.
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Electrical specifications VN5050J-E 2.4 Electrical characteristics curves Figure 8. Off state output current Figure 9. Iloff1 (uA) High level input current lih (uA) 1 5 4.5 0.875 Off state Vcc=13V Vin=Vout=0V 0.75 Vin=2.1V 4 3.5 0.625 3 0.5 2.5 2 0.375 1.5 0.25 1 0.125 0.5 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 50 75 100 125 150 175 100 125 150 175 150 175 Tc (°C) Figure 10. Input clamp voltage Figure 11.
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VN5050J-E Electrical specifications Figure 14. Status low output voltage On state resistance vs Tcase Vstat (V) Ron (mOhm) 0.9 100 90 0.8 Istat=1.6mA Iout=2A Vcc=13V 80 0.7 70 0.6 60 0.5 50 0.4 40 0.3 30 0.2 20 0.1 10 0 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 15. Status leakage current Figure 16. On state resistance vs VCC Ilstat (uA) Ron (mOhm) 0.055 100 90 0.05 Tc= 150°C 80 Vstat=5V 70 0.
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Electrical specifications VN5050J-E Figure 19. Openload Off state voltage detection threshold Figure 20. ILIM vs Tcase Ilimh (A) Vol (V) 25 5 22.5 4.5 Vcc=13V Vin=0V 4 20 3.5 17.5 3 15 2.5 12.5 2 10 1.5 7.5 5 1 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 21. Turn-On voltage slope Figure 22. Undervoltage shutdown dVout/dt(on) (V/ms) Vusd (V) 1000 14 900 Vcc=13V RI=6.
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VN5050J-E Electrical specifications Figure 25. High level STAT_DIS voltage Figure 26.
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Application information 3 VN5050J-E Application information Figure 27. Application schematic +5V +5V VCC Rprot STAT_DIS Dld Rprot INPUT C OUTPUT Rprot STATUS GND VGND RGND DGND 3.1 GND protection network against reverse battery 3.1.1 Solution 1: resistor in the ground line (RGND only) This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. RGND  600mV / (IS(on)max). 2.
PAGE 21
VN5050J-E 3.1.2 Application information Solution 2: diode (DGND) in the ground line A resistor (RGND=1kshould be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground.
PAGE 22
Application information VN5050J-E The values of VOLmin, VOLmax and IL(off2) are available in the Electrical characteristics section. Figure 28. Open load detection in Off state V batt.
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VN5050J-E 3.5 Application information Maximum demagnetization energy (VCC = 13.5V) Figure 29.
PAGE 24
Package and PCB thermal data VN5050J-E 4 Package and PCB thermal data 4.1 PowerSSO-12™ thermal data Figure 30. PowerSSO-12™ PC Board Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70 µm (front and back side), Copper areas: from minimum pad lay-out to 8cm2). Figure 31. Rthj-amb Vs.
PAGE 25
VN5050J-E Package and PCB thermal data Figure 32. PowerSSO-12™ thermal impedance junction ambient single pulse ZTH ( ° C/ W) 100 Footprint 2 cm2 8 cm2 10 1 0,1 0,001 0,01 0,1 1 Time ( s) 10 100 1000 Equation 1: pulse calculation formula Z TH = R TH   + Z THtp  1 –   where  = tP/T Figure 33.
PAGE 26
Package and PCB thermal data Table 14. 26/31 VN5050J-E Thermal parameter Area/island (cm2) Footprint R1 (°C/W) 0.7 R2 (°C/W) 2.8 R3 (°C/W) 3 R4 (°C/W) 2 8 8 8 7 R5 (°C/W) 22 15 10 R6 (°C/W) 26 20 15 C1 (W.s/°C) 0.001 C2 (W.s/°C) 0.0025 C3 (W.s/°C) 0.0166 C4 (W.s/°C) 0.2 0.1 0.1 C5 (W.s/°C) 0.27 0.8 1 C6 (W.
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VN5050J-E Package and packing information 5 Package and packing information 5.1 ECOPACK® packages In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark.
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Package and packing information VN5050J-E PowerSSO-12™ mechanical data Table 15. Millimeters Symbol Min. Max. A 1.250 1.620 A1 0.000 0.100 A2 1.100 1.650 B 0.230 0.410 C 0.190 0.250 D 4.800 5.000 E 3.800 4.000 e 0.800 H 5.800 6.200 h 0.250 0.500 L 0.400 1.270 k 0° 8° X 2.200 2.800 Y 2.900 3.500 ddd 28/31 Typ. 0.
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VN5050J-E 5.3 Package and packing information Packing information Figure 35. PowerSSO-12™ tube shipment (no suffix) B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C A 100 2000 532 1.85 6.75 0.6 All dimensions are in mm. Figure 36. PowerSSO-12™ tape and reel shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.
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Revision history 6 VN5050J-E Revision history Table 16. Document revision history Date Revision 30-Mar-2006 1 Initial release. 2 Document reformatted and restructured. Contents and lists of tables and figures added. Figure 2: Configuration diagram (top view) updated: pins 1-6-712 N.C. (not connected). Table 4: Absolute maximum ratings: EMAX entries updated. Table 13: Electrical transient requirements :Test level values III and IV for test pulse 5b and notes updated. Section 3.
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VN5050J-E  Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.