Datasheet

5 Operation Description VIPer50A-E/ASP-E
20/31
Figure 17. Mixed Soft Start and Compensation Figure 18. Latched Shut Down
Figure 19. Typical Compensation Network Figure 20. Slope Compensation
Figure 21. External Clock Synchronization Figure 22. Current Limitation Circuit Example
-
+
13V
OSC
COMP SOURCE
DRAINVDD
VIPer50
R1
C1
+
C2
D1
R2
R3
D2
D3
+
C3
AUXILIAR
Y
WINDING
FC00331
C4
-
+
13V
OSC
COMP SOURCE
DRAINVDD
VIPer50
Shutdown
Q1
Q2
R1
R2R3
R4
D1
FC00340
-
+
13V
OSC
COMP SOURCE
DRAINVDD
VIPer50
R1
C1
FC00351
C2
-
+
13V
OSC
COMP SOURCE
DRAINVDD
VIPer50
R1R2
Q1
C2
C1 R3
FC00361
C3
-
+
13V
OSC
COMP SOURCE
DRAINVDD
VIPer50
10 k
Ω
FC00370
-
+
13V
OSC
COMP SOURCE
DRAINVDD
VIPer50
R1
R2
Q1
FC00380