Datasheet
Table Of Contents
- Figure 1. Typical topology
- Table 1. Device summary
- 1 Block diagram
- 2 Typical power
- 3 Pin settings
- 4 Electrical data
- 5 Typical electrical characteristics
- Figure 7. Current limit vs. TJ
- Figure 8. Switching frequency vs. TJ
- Figure 9. Drain start voltage vs. TJ
- Figure 10. HFB vs. TJ
- Figure 11. Brownout threshold vs. TJ
- Figure 12. Brownout hysteresis vs. TJ
- Figure 13. Brownout hysteresis current vs. TJ
- Figure 14. Operating supply current (not switching) vs. TJ
- Figure 15. Operating supply current (switching) vs. TJ
- Figure 16. Current limit vs. RLIM
- Figure 17. Power MOSFET ON resistance vs. TJ
- Figure 18. Power MOSFET breakdown voltage vs. TJ
- Figure 19. Thermal shutdown
- 6 Typical circuit
- 7 Efficiency performances for a typical flyback converter
- 8 Operation description
- 8.1 Power section and gate driver
- 8.2 High voltage startup generator
- 8.3 Power-up and soft-start
- 8.4 Power down operation
- 8.5 Auto-restart operation
- 8.6 Oscillator
- 8.7 Current mode conversion with adjustable current limit set point
- 8.8 Overvoltage protection (OVP)
- 8.9 About the CONT pin
- 8.10 Feedback and overload protection (OLP)
- 8.11 Burst mode operation at no load or very light load
- 8.12 Brownout protection
- 8.13 2nd level overcurrent protection and hiccup mode
- 9 Package mechanical data
- 10 Revision history
Operation description VIPER37
28/35 Doc ID 022218 Rev 1
Figure 30. FB pin configuration 1
Figure 31. FB pin configuration 2
8.11 Burst mode operation at no load or very light load
When the load decreases, the feedback loop reacts by lowering the feedback pin voltage. If
it falls below the burst mode threshold, V
FBbm
, the Power MOSFET is no longer allowed to
be switched on. After the MOSFET stops, as a result of the feedback reaction to the energy
delivery stop, the feedback pin voltage increases and when it exceeds the level, V
FBbm
+
V
FBbmhys
, the power MOSFET starts switching again. The burst mode thresholds are
reported in
Tabl e 8
and
Figure 32
shows this behavior. Depending on the output load, the
power alternates between periods of time in which the Power MOSFET is switching and is
enabled, with periods of time when the Power MOSFET is not switching; this working mode
is called burst mode. The power delivered to the output during switching periods exceeds
the load power demands; the excess of power is balanced from the non-switching period
where no power is processed. The advantage of burst mode operation is an average
switching frequency much lower then the normal operation working frequency, up to a few
hundred hertz, minimizing all frequency related losses. During burst mode the drain current
peak is clamped to the level, I
D_BM
, reported in
Tabl e 8
.
From sense FET
4.8V
BURST
PWM
CONTROL
Cfb
To PWM Logic
BURST-MODE
REFERENCES
BURST-MODE
LOGIC
+
-
PWM
+
-
OLP comparator
To disable logic
4.8V
From sense FET
PWM
CONTROL
+
-
PWM
BURST
To disable logic
+
-
OLP comparator
To PWM Logic
BURST-MODE
LOGIC
Cfb1
Rfb1
Cfb
BURST-MODE
REFERENCES