Datasheet

Table Of Contents
Operation description VIPER37
26/35 Doc ID 022218 Rev 1
8.10 Feedback and overload protection (OLP)
The device is a current mode converter: the feedback pin controls the PWM operation,
controls the burst mode, and actives the overload protection.
Figure 30
and
Figure 31
show
the internal current mode structure.
With the feedback pin voltage between
V
FBbm
and V
FBlin
, (see
Tabl e 8
) the drain current is
sensed and converted into voltage that is applied to the non-inverting pin of the PWM
comparator.
This voltage is compared with the one on the feedback pin through a voltage divider on a
cycle-by-cycle basis. When these two voltages are equal, the PWM logic orders the switch-
off of the Power MOSFET. The drain current is always limited to the I
Dlim
value.
In case of overload, the feedback pin increases in reaction to this event and when it goes
higher than
V
FBlin
, the PWM comparator is disabled and the drain current is limited to I
Dlim
by
the OCP comparator, see
Figure 2
.
When the feedback pin voltage reaches the threshold V
FBlin
,
an internal current generator
starts to charge the feedback capacitor (C
FB
) and when the feedback voltage reaches the
V
FBolp
threshold, the converter is turned off and the startup phase is activated with a reduced
value of I
DDch
to 0.6 mA, see
Tabl e 7
.
During the first startup phase of the converter, after the soft-start time (t
SS
), the output
voltage may force the feedback pin voltage to rise up to the
V
FBolp
threshold that switches off
the converter itself.
To avoid this event, the appropriate feedback network must be selected according to the
output load. Moreover, the feedback network fixes the compensation loop stability.
Figure 30
and
Figure 31
show the two different feedback networks.
The time from the overload detection (VFB =
V
FBlin
) to the device shutdown
(VFB =
V
FBolp
) can be set by the C
FB
value (see
Figure 30
and
Figure 31
), using the formula:
Equation 5
where I
FB
is the value, reported in
Ta bl e 8
, when the FB voltage is between V
FBlin
and
V
FBolp
.
In
Figure 30
, the capacitor connected to the FB pin (C
FB
) is part of the compensation circuit
as well as being necessary to activate the overload protection.
Table 11. CONT pin configurations
Function / component R
LIM
(1)
1. R
LIM
must be fixed before R
OVP
.
R
OVP
D
AUX
I
Dlim
reduction See
Figure 16
No No
OVP
80 k
See
Equation 4
Ye s
I
Dlim
reduction + OVP See
Figure 16
See
Equation 4
Ye s
T
OLP delay
C
FB
V
FBolp
V
FBlin
I
FB
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