Datasheet

Table Of Contents
VIPER37 Operation description
Doc ID 022218 Rev 1 19/35
8 Operation description
The device is a high-performance low-voltage PWM controller chip with an 800 V avalanche
rugged power section.
The controller includes: the oscillator with jittering feature, the startup circuits with soft-start
feature, the PWM logic, the current limit circuit with adjustable set point, the second
overcurrent circuit, the burst mode management, the brownout circuit, the UVLO circuit, the
auto-restart circuit, and the thermal protection circuit.
The current limit set-point is set by the CONT pin. The burst mode operation guarantees
high performance in standby mode and helps to accomplish the energy saving norm.
All the fault protections are built in auto-restart mode with very low repetition rate to prevent
the IC overheating.
8.1 Power section and gate driver
The power section is implemented with an avalanche ruggedness N-channel MOSFET,
which guarantees safe operation within the specified energy rating as well as high dv/dt
capability. The power section has a B
VDSS
of 800 V min. and a typical R
DS(on)
of 4.5
at 25 ° C.
The integrated SenseFET structure allows a virtually loss-less current sensing.
The gate driver is designed to supply a controlled gate current during both turn-on and turn-
off in order to minimize common mode EMI. Under UVLO conditions an internal pull-down
circuit holds the gate low in order to ensure that the power section cannot be turned on
accidentally.
8.2 High voltage startup generator
The HV current generator is supplied through the DRAIN pin and is enabled only if the input
bulk capacitor voltage is higher than the V
DRAIN_START
threshold, 80 V
DC
(typical). When the
HV current generator is ON, the I
DDch
current (3 mA typical value) is delivered to the
capacitor on the V
DD
pin. In the case of auto-restart mode after a fault event, the I
DDch
current is reduced to 0.6 mA, in order to have a slow duty cycle during the restart phase.