Datasheet

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June 2006 Rev 2 1/34

VIPer20A-E

SMPS primary I.C.

General features

■ Adjustable switching frequency up to 200 kHz

■ Current mode control

■ Soft start and shutdown control

■ Automatic burst mode operation in stand-by

condition able to meet “blue angel” norm (<1w

total power consumption)

■ Internally trimmed zener reference

■ Undervoltage lock-out with hysteresis

■ Integrated start-up supply

■ Over-temperature protection

■ Low stand-by current

■ Adjustable current limitation

Description

All the devices are made using VIPower M0

Technology, combines on the same silicon chip a

state-of-the-art PWM circuit together with an

optimized, high voltage, Vertical Power MOSFET

(700V/ 0.5A).

Typical applications cover offline power supplies

with a secondary power capability of 10W in wide

range condition and 20W in single range or with

doubler configuration. It is compatible from both

primary or secondary regulation loop despite

using around 50% less components when

compared with a discrete solution. Burst mode

operation is an additional feature of this device,

offering the ability to operate in stand-by mode

without extra components.

Type

DSS

DS(on)

VIPer20A-E

VIPer20ASP-E

VIPer20ADIP-E

700V

0.5A

Ω

18Ω

PENTAWATT HV

PENTAWATT HV (022Y)

DIP-8

POWERSO-10

www.st.com

Block diagram

VDD

OSC

COMP

DRAIN

SOURCE

13 V

UVLO

LOGIC

SECURITY

LATCH

PWM

LATCH

FFFF

R/S

R2 R3

OSCILLATOR

OVERTEMP.

DETECTOR

ERROR

AMPLIFIER

0.5 V

1.7

delay

250 ns

Blanking

CURRENT

AMPLIFIER

ON/OFF

0.5V

6 V/A

4.5 V

FC00491

Summary of content (34 pages)

PAGE 1
VIPer20A-E SMPS primary I.C. General features Type VDSS In RDS(on) VIPer20A-E VIPer20ASP-E VIPer20ADIP-E 700V 700V 700V 0.5A 0.5A 0.
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VIPer20A-E Contents Contents 1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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VIPer20A-E 6 Electrical over stress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.1 7 Contents Electrical over stress ruggedness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.1 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8 Package mechanical data . . . .
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VIPer20A-E Electrical data 1 Electrical data 1.1 Maximum rating Table 1. Absolute maximum rating Symbol VDS ID Parameter Continuous Drain-Source Voltage (TJ = 25 to 125°C) Maximum Current Value Unit –0.3 to 700 V Internally limited A 0 to 15 V VDD Supply Voltage VOSC Voltage Range Input 0 to VDD V VCOMP Voltage Range Input 0 to 5 V ICOMP Maximum Continuous Current ±2 mA VESD Electrostatic Discharge (R = 1.
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VIPer20A-E 1.2 Electrical data Electrical characteristics TJ = 25°C; VDD = 13V, unless otherwise specified Table 2. Power section Symbol Parameter BVDS Drain-Source Voltage ID = 1mA; VCOMP = 0V IDSS Off-State Drain Current VCOMP = 0V; Tj = 125°C Static Drain-Source On Resistance ID = 0.4A ID = 0.4A; TJ= 100°C tf Fall Time ID = 0.2A; VIN =300V (1) Figure 7 100 ns tr Rise Time ID = 0.
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VIPer20A-E Electrical data Table 5. Error amplifier section Symbol Parameter Test conditions VDDREG VDD Regulation Point ICOMP=0mA (see Figure 5) ∆VDDreg Total Variation TJ = 0 to 100°C Min Typ Max Unit 12.6 13 13.4 V 2 % 150 KHz dB From Input =VDD to Output = VCOMP GBW Unity Gain Bandwidth AVOL Open Loop Voltage Gain COMP pin is open Figure 15 45 52 DC Transconductance VCOMP=2.5V(see Figure 5) 1.1 1.5 Gm COMP pin is open Figure 15 1.
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VIPer20A-E 2 Thermal data Thermal data Table 8. Thermal data Symbol PENTAWATT PowerSO-10™(1) Parameter RthJA Thermal Resistance Junction-pin Max RthJC Thermal Resistance Junction-case Max 2.0 2.0 RthJC Thermal Resistance Ambient-case Max 70 60 DIP-8 Unit 20 °C/W °C/W 35 (2) °C/W 1. When mounted using the minimum recommended pad size on FR-4 board. 2. On multylayer PCB.
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VIPer20A-E Pin description 3 Pin description 3.1 Drain pin (Integrated Power MOSFET drain): Integrated Power MOSFET drain pin. It provides internal bias current during start-up via an integrated high voltage current source which is switched off during normal operation. The device is able to handle an unclamped current during its normal operation, assuring self protection against voltage surges, PCB stray inductance, and allowing a snubberless operation for low output power. 3.
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VIPer20A-E 3.5 Pin description OSC pin (oscillator frequency): An Rt-Ct network must be connected on that to define the switching frequency. Note that despite the connection of Rt to VDD, no significant frequency change occurs for VDD varying from 8V to 15V. It provides also a synchronisation capability, when connected to an external frequency source. Figure 1. Connection diagrams (top view) PENTAWATT HV Figure 2.
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VIPer20A-E Typical circuit 4 Typical circuit Figure 3. Offline power supply with auxiliary supply feedback F1 BR1 TR2 C1 TR1 D2 AC IN L2 +Vcc D1 R9 C2 C7 C9 R1 C3 GND D3 C10 R7 C4 R2 VDD DRAIN - OSC VIPer20 + 13V COMP SOURCE C5 C6 C11 R3 FC00401 Figure 4.
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VIPer20A-E Operation description 5 Operation description 5.1 Current mode topology: The current mode control method, like the one integrated in the devices, uses two control loops - an inner current control loop and an outer loop for voltage control. When the Power MOSFET output transistor is on, the inductor current (primary side of the transformer) is monitored with a SenseFET technique and converted into a voltage VS proportional to this current.
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VIPer20A-E Operation description As soon as the power goes below this limit, the auxiliary secondary voltage starts to increase above the 13V regulation level, forcing the output voltage of the transconductance amplifier to low state (VCOMP < VCOMPth). This situation leads to the shutdown mode where the power switch is maintained in the Off state, resulting in missing cycles and zero duty cycle.
PAGE 13
VIPer20A-E Operation description The soft start feature can be implemented on the COMP pin through a simple capacitor which will be also used as the compensation network. In this case, the regulation loop bandwidth is rather low, because of the large value of this capacitor. In case a large regulation loop bandwidth is mandatory, the schematics of (see Figure 17) can be used. It mixes a high performance compensation network together with a separate high value soft start capacitor.
PAGE 14
Operation description 5.5 VIPer20A-E External clock synchronization: The OSC pin provides a synchronisation capability when connected to an external frequency source. Figure 21 shows one possible schematic to be adapted, depending the specific needs. If the proposed schematic is used, the pulse duration must be kept at a low value (500ns is sufficient) for minimizing consumption. The optocoupler must be able to provide 20mA through the optotransistor. 5.
PAGE 15
VIPer20A-E 5.8 Operation description Operation pictures Figure 5. VDD Regulation point ICOMP Figure 6. Undervoltage lockout IDD Slope = Gmin mA/V ICOMPHI IDD0 VDD VDS= 35 V Fsw = 0 VDDhyst 0 VDDon VDD VDDoff ICOMPLO IDDch VDDreg FC00170 FC00150 Figure 7. Transition time Figure 8. Shutdown action VOSC ID t 10% Ipeak VDS t VCOMP tDISsu 90% VD VCOMPth t 10% VD t tf ID tr FC00160 t ENABLE ENABLE DISABLE FC00060 Figure 9. Breakdown voltage vs temperature Figure 10.
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VIPer20A-E Operation description Figure 11. Behaviour of the high voltage current source at start-up VDD 2 mA VDDon VDDoff 15 mA 3 mA VDD 1 mA DRAIN 15 mA CVDD Ref. t Auxiliary primary winding UNDERVOLTAGE LOCK OUT LOGIC VIPer20 Start up duty cycle ~ 12% Figure 12.
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VIPer20A-E Operation description Figure 13.
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VIPer20A-E Operation description Figure 14. Oscillator For Rt > 1.2kΩ and Ct ≤40KHz VDD Rt OSC Ct ~360Ω CLK FC00050 Ct Forbidden area Ct(nF) = 22nF 880 Fsw(kHz) 15nF Forbidden area Fsw 40kHz Oscillator frequency vs Rt and Ct FC00030 1,000 Ct = 1.5 nF 500 Frequency (kHz) Ct = 2.7 nF 300 Ct = 4.
PAGE 19
VIPer20A-E Operation description Figure 15. Error amplifier frequency response FC00200 60 RCOMP = +∞ Voltage Gain (dB) RCOMP = 270k 40 RCOMP = 82k RCOMP = 27k 20 RCOMP = 12k 0 (20) 0.001 0.01 0.1 1 10 Frequency (kHz) 100 1,000 Figure 16. Error amplifier phase response FC00210 200 RCOMP = +∞ 150 RCOMP = 270k Phase (°) RCOMP = 82k RCOMP = 27k 100 RCOMP = 12k 50 0 (50) 0.001 0.01 0.
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VIPer20A-E Operation description Figure 17. Mixed soft start and compensation Figure 18. Latched shut down D2 D3 VIPer20 VDD VDD - OSC 13V VIPer20 R1 DRAIN Q2 R3 + COMP DRAIN - OSC + 13V SOURCE D1 COMP SOURCE AUXILIARY WINDING R3 R2 R1 C4 R2 + C3 R4 Shutdown + C2 C1 D1 Q1 FC00440 FC00431 Figure 19. Typical compensation network Figure 20.
PAGE 21
VIPer20A-E Electrical over stress 6 Electrical over stress 6.1 Electrical over stress ruggedness The VIPer may be submitted to electrical over-stress, caused by violent input voltage surges or lightning. Following the Layout Considerations is sufficient to prevent catastrophic damages most of the time. However in some cases, the voltage surges coupled through the transformer auxiliary winding can exceed the VDD pin absolute maximum rating voltage value.
PAGE 22
VIPer20A-E Layout 7 Layout 7.1 Layout considerations Some simple rules insure a correct running of switching power supplies. They may be classified into two categories: – Minimizing power loops: The switched power current must be carefully analysed and the corresponding paths must be as small an inner loop area as possible. This avoids radiated EMC noises, conducted EMC noises by magnetic coupling, and provides a better efficiency by eliminating parasitic inductances, especially on secondary side.
PAGE 23
VIPer20A-E 8 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark.
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VIPer20A-E Package mechanical data Table 9. Pentawatt HV Mechanical data mm. inch Dim Min Typ Max Min Typ A 4.30 4.80 0.169 0.189 C 1.17 1.37 0.046 0.054 D 2.40 2.80 0.094 0.11 E 0.35 0.55 0.014 0.022 F 0.60 0.80 0.024 0.031 G1 4.91 5.21 0.193 0.205 G2 7.49 7.80 0.295 0.307 H1 9.30 9.70 0.366 0.382 H2 10.40 0.409 H3 10.05 10.40 L 15.60 17.30 6.14 0.681 L1 14.60 15.22 0.575 0.599 L2 21.20 21.85 0.835 0.860 L3 22.20 22.82 0.874 0.
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VIPer20A-E Table 10. Package mechanical data Pentawatt HV 022Y ( Vertical High Pitch ) Mechanical data mm. inch Dim Min Typ Max Min Typ Max A 4.30 4.80 0.169 0.189 C 1.17 1.37 0.046 0.054 D 2.40 2.80 0.094 0.110 E 0.35 0.55 0.014 0.022 F 0.60 0.80 0.024 0.031 G1 4.91 5.21 0.193 0.205 G2 7.49 7.80 0.295 0.307 H1 9.30 9.70 0.366 0.382 H2 10.40 0.409 H3 10.05 10.40 0.396 0.409 L 16.42 17.42 0.646 0.686 L1 14.60 15.22 0.575 0.599 L3 20.52 21.
PAGE 26
VIPer20A-E Package mechanical data Table 11. DIP-8 Mechanical data mm Inch Dim. Min A Typ Min 3.32 Typ Max 0.131 a1 0.51 B 1.15 1.65 0.045 0.020 0.065 b 0.356 0.55 0.014 0.022 b1 0.204 0.304 0.008 0.012 0.313 0.384 D E 10.92 7.95 9.75 0.430 e 2.54 0.100 e3 7.62 0.300 e4 7.62 0.300 F 6.6 0.260 I 5.08 0.200 L 3.18 Z Figure 27. Package dimensions 26/34 Max 3.81 1.52 0.125 0.150 0.
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VIPer20A-E Table 12. Package mechanical data PowerSO-10 mechanical data mm Inch Dim. Min Typ Max Min Typ Max A 3.35 3.65 0.132 0.144 A1 0.00 0.10 0.000 0.004 B 0.40 0.60 0.016 0.024 C 0.35 0.55 0.013 0.022 D 9.40 9.60 0.370 0.378 D1 7.40 7.60 0.291 0.300 e 1.27 0.050 E 9.30 9.50 0.366 0.374 E1 7.20 7.40 0.283 0.291 E2 7.20 7.60 0.283 0.300 E3 6.10 6.35 0.240 0.250 E4 5.90 6.10 0.232 0.240 F 1.25 1.35 0.049 0.053 h 0.50 0.002 H 13.
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VIPer20A-E Package mechanical data Figure 29. Power Pad layout Figure 30. Tube shipment Table 13. Tube shipment Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) Casablanca 50 1000 532 10.4 16.4 0.8 Muar 50 1000 532 4.9 17.2 0.
PAGE 29
VIPer20A-E Package mechanical data Figure 31. Reel shipment Table 14. Note: Reel dimension Base Q.ty 600 Bulk Q.ty 600 A (max) 330 B (min) 1.5 C (± 0.2) 13 F 20.2 G (± 0.2) 24.4 N (min) 60 T (max) 30.4 All dimensoin are in mm.
PAGE 30
VIPer20A-E Package mechanical data Figure 32. Tape shipment Table 15. Note: 30/34 Tape dimension Tape width W 24 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 24 Hole Diameter D (± 0.1/-0) 1.5 Hole Diameter D1 (min) 1.5 Hole Position F (± 0.05) 11.5 Compartment Depth K (max) 6.5 Hole Spacing P1 (± 0.1) 2 All dimensions are in mm.
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VIPer20A-E Package mechanical data Figure 33. Pentawatt HV tube shipment ( no suffix ) Table 16. Tube dimension Base Q.ty 50 Bulk Q.ty 1000 Tube length (± 0.5 ) 532 A 18 B 33.1 C (± 0.1) 1 Note: All dimensions are in mm. Figure 34. Dip-8 Tube shipment (no suffix) Table 17. Tube dimension Base Q.ty 20 Bulk Q.ty 1000 Tube length (± 0.5 ) 532 A 8.4 B 11.2 C (± 0.1) 0.8 Note: All dimensions are in mm.
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VIPer20A-E Order code 9 Order code Table 18.
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VIPer20A-E 10 Revision history Revision history Table 19. Revision history Date Revision Changes 28-Sep-2005 1 Initial release.
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VIPer20A-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.