Datasheet

DocID14419 Rev 9 21/32
VIPER17 Operation descriptions
32
7.10 Feed-back and overload protection (OLP)
The VIPER17 is a current mode converter: the feedback pin controls the PWM operation,
controls the burst mode and actives the overload protection. Figure 28 on page 23 and
Figure 29 show the internal current mode structure.
With the feedback pin voltage between
V
FBbm
and V
FBlin
, see Table 8 on page 7, the drain
current is sensed and converted in voltage that is applied to the non inverting pin of the
PWM comparator. See Figure 2 on page 3.
This voltage is compared with the one on the feedback pin through a voltage divider on
cycle by cycle basis. When these two voltages are equal, the PWM logic orders the switch
off of the power MOSFET. The drain current is always limited to I
Dlim
value.
In case of overload the feedback pin increases in reaction to this event and when it goes
higher than
V
FBlin
, the PWM comparator is disabled and the drain current is limited to I
Dlim
by
the OCP comparator, seeFigure 2 on page 3.
When the feedback pin voltage reaches the threshold V
FBlin
an internal current generator
starts to charge the feedback capacitor (C
FB
) and when the feedback voltage reaches the
V
FBolp
threshold, the converter is turned off and the start up phase is activated with reduced
value of I
DDch
to 0.6 mA. See Table 7 on page 6.
During the first start up phase of the converter, after the soft-start up time, t
SS
, the output
voltage could force the feedback pin voltage to rise up to the
V
FBolp
threshold that switches
off the converter itself.
To avoid this event, the appropriate feedback network has to be selected according to the
output load. More the network feedback fixes the compensation loop stability. The Figure 28
on page 23 and Figure 29 show the two different feedback networks.
The time from the over load detection (V
FB
= V
FBlin
) to the device shutdown
(V
FB
= V
FBolp
) can be calculating by C
FB
value (see Figure 28 on page 23 and Figure 29),
using the formula:
Equation 5
In the Figure 28, the capacitor connected to FB pin (C
FB
) is used as part of the circuit to
compensate the feedback loop but also as element to delay the OLP shut down owing to the
time needed to charge the capacitor (see equation 5).
Table 10. CONT pin configurations
Function / component R
LIM
(1)
1. R
LIM
has to be fixed before of R
OVP
R
OVP
D
AUX
I
Dlim
reduction See Figure 16 No No
OVP ≥ 80 KΩ See Equation 4 Yes
I
Dlim
reduction + OVP See Figure 16 See Equation 4 Yes
T
OLP delay–
C
FB
V
FBolp
V
FBlin
–
3μA
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