Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsPMICsPMIC - AC/DC converter, offline switcher Flyback EN, Frequency control, Soft Start Po

Rev 1

September 2005 1/31

OSC

COMP

DRAIN

SOURCE

13 V

UVLO

LOGIC

SECURITY

LATCH

PWM

LATCH

R/S

R2 R3

OSCILLATOR

OVERTEMP.

DETECTOR

ERROR

AMPLIFIER

0.5 V +

1.7

DELAY

250 ns

BLANKING

CURRENT

AMPLIFIER

ON/OFF

0.5V

1 V/A

4.5 V

VIPer100A-E

VIPer100ASP-E

SMPS PRIMARY I.C.

General Features

■ ADJUSTABLE SWITCHING FREQUENCY UP

TO 200 kHz

■ CURRENT MODE CONTROL

■ SOFT START AND SHUTDOWN CONTROL

■ AUTOMATIC BURST MODE OPERATION IN

STAND-BY CONDITION ABLE TO MEET

“BLUE ANGEL” NORM (<1w TOTAL POWER

CONSUMPTION)

■ INTERNALLY TRIMMED ZENER

REFERENCE

■ UNDERVOLTAGE LOCK-OUT WITH

HYSTERESIS

■ INTEGRATED START-UP SUPPLY

■ OVER-TEMPERATURE PROTECTION

■ LOW STAND-BY CURRENT

■ ADJUSTABLE CURRENT LIMITATION

Block Diagram

Description

VIPer100A-E/ASP-E, made using VIPower M0

Technology, combines on the same silicon chip a

state-of-the-art PWM circuit together with an

optimized, high voltage, Vertical Power MOSFET

(700V/ 3A).

Typical applications cover offline power supplies

with a secondary power capability of 50W in wide

range condition and 100W in single range or with

doubler configuration. It is compatible from both

primary or secondary regulation loop despite

using around 50% less components when

compared with a discrete solution. Burst mode

operation is an additional feature of this device,

offering the ability to operate in stand-by mode

without extra components.

Type

DSS

DS(on)

VIPer100A-E/ASP-E 700V 3 A 2.8 Ω

PENTAWATT HV

PENTAWATT HV (022Y)

www.st.com

POWERSO-10

Summary of content (31 pages)

PAGE 1
VIPer100A-E VIPer100ASP-E SMPS PRIMARY I.C. General Features In VDSS Type RDS(on) 10 VIPer100A-E/ASP-E 700V 2.
PAGE 2
VIPer100A-E/ASP-E Contents 1 Electrical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1 Maximum Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 3
VIPer100A-E/ASP-E 6 Electrical Over Stress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.1 7 Electrical Over Stress Ruggedness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.1 Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8 Package Mechanical Data . . . . . . . .
PAGE 4
VIPer100A-E/ASP-E 1 Electrical Data 1 Electrical Data 1.1 Maximum Rating Table 1. Absolute Maximum Rating Symbol VDS ID Parameter Continuous Drain-Source Voltage (TJ = 25 to 125°C) Maximum Current Value Unit –0.3 to 700 V Internally limited A 0 to 15 V VDD Supply Voltage VOSC Voltage Range Input 0 to VDD V VCOMP Voltage Range Input 0 to 5 V ICOMP Maximum Continuous Current ±2 mA VESD Electrostatic Discharge (R =1.
PAGE 5
VIPer100A-E/ASP-E 1.2 1 Electrical Data Electrical Characteristics TJ = 25°C; V DD = 13V, unless otherwise specified Table 2. Power Section Symbol Parameter BVDS Drain-Source Voltage IDSS Off-State Drain Current Test Conditions ID = 1mA; VCOMP = 0V Min Typ Max 700 Unit V VCOMP = 0V; T j = 125°C VDS = 700V 2.0 mA 2.8 5.0 Ω Static Drain-Source On Resistance ID = 2A; Tj = 100°C tf Fall Time ID = 0.2A; VIN =300V (1)Figure 7 100 ns tr Rise Time ID = 0.
PAGE 6
VIPer100A-E/ASP-E 1 Electrical Data Table 5. Symbol Error Amplifier Section Parameter Test Conditions‘ VDDREG VDD Regulation Point ICOMP=0mA (see Figure 5) ∆VDDreg Total Variation Tj=0 to 100°C GBW Unity Gain Bandwidth From Input =VDD to Min Typ Max Unit 12.6 13 13.4 V 2 % 150 KHz dB Output = VCOMP COMP pin is open (see Figure 15) AVOL Open Loop Voltage Gain COMP pin is open (see Figure 15) 45 52 Gm DC Transconductance VCOMP=2.5V(see Figure 5) 1.1 1.
PAGE 7
VIPer100A-E/ASP-E 2 2 Thermal Data Thermal Data Table 8. Symbol Thermal data Parameter PENTAWATT HV Unit RthJC Thermal Resistance Junction-case Max 1.
PAGE 8
3 Pin Description 3 Pin Description 3.1 Drain Pin (Integrated Power MOSFET Drain): VIPer100A-E/ASP-E Integrated Power MOSFET drain pin. It provides internal bias current during start-up via an integrated high voltage current source which is switched off during normal operation. The device is able to handle an unclamped current during its normal operation, assuring self protection against voltage surges, PCB stray inductance, and allowing a snubberless operation for low output power. 3.
PAGE 9
VIPer100A-E/ASP-E 3.5 3 Pin Description OSC Pin (Oscillator Frequency): An Rt-Ct network must be connected on that to define the switching frequency. Note that despite the connection of Rt to VDD, no significant frequency change occurs for VDD varying from 8V to 15V. It provides also a synchronisation capability, when connected to an external frequency source. Figure 1. Connection Diagrams (Top View) PENTAWATT HV Figure 2.
PAGE 10
VIPer100A-E/ASP-E 4 Typical Circuit 4 Typical Circuit Figure 3. Offline Power Supply With Auxiliary Supply Feedback F1 BR1 TR2 C1 TR1 D2 AC IN L2 +Vcc D1 R9 C2 C7 C9 R1 C3 GND D3 C10 R7 C4 R2 VDD DRAIN - U1 OSC VIPer100 + 13V COMP SOURCE C5 C6 C11 R3 FC00081 Figure 4.
PAGE 11
VIPer100A-E/ASP-E 5 Operation Description 5.1 Current Mode Topology: 5 Operation Description The current mode control method, like the one integrated in the VIPer100A-E/ASP-E, uses two control loops - an inner current control loop and an outer loop for voltage control. When the Power MOSFET output transistor is on, the inductor current (primary side of the transformer) is monitored with a SenseFET technique and converted into a voltage VS proportional to this current.
PAGE 12
5 Operation Description VIPer100A-E/ASP-E As soon as the power goes below this limit, the auxiliary secondary voltage starts to increase above the 13V regulation level, forcing the output voltage of the transconductance amplifier to low state (VCOMP < VCOMPth). This situation leads to the shutdown mode where the power switch is maintained in the Off state, resulting in missing cycles and zero duty cycle.
PAGE 13
VIPer100A-E/ASP-E 5 Operation Description VDDhyst is the voltage hysteresis of the UVLO logic (refer to the minimum specified value). The soft start feature can be implemented on the COMP pin through a simple capacitor which will be also used as the compensation network. In this case, the regulation loop bandwidth is rather low, because of the large value of this capacitor. In case a large regulation loop bandwidth is mandatory, the schematics of (see Figure 17) can be used.
PAGE 14
5 Operation Description 5.5 VIPer100A-E/ASP-E External Clock Synchronization: The OSC pin provides a synchronisation capability when connected to an external frequency source. Figure 21 shows one possible schematic to be adapted, depending the specific needs. If the proposed schematic is used, the pulse duration must be kept at a low value (500ns is sufficient) for minimizing consumption. The optocoupler must be able to provide 20mA through the optotransistor. 5.
PAGE 15
VIPer100A-E/ASP-E 5.8 5 Operation Description Operation Pictures Figure 5. VDD Regulation Point ICOMP Figure 6. Undervoltage Lockout IDD Slope = Gmin mA/V ICOMPHI IDD0 VDD 0 VDDhyst ICOMPLO VDDoff VD S= 35 V Fsw = 0 VDDon VDD IDDch VDDreg FC00170 FC00150 Figure 7. Transition Time Figure 8. Shutdown Action VOSC ID t VCOMP tDISsu 10% Ipeak t VDS VCOMPth 90% VD t ID 10% VD t tf tr t FC00160 ENABLE ENABLE DISABLE FC00060 Figure 9. Breakdown Voltage vs.
PAGE 16
VIPer100A-E/ASP-E 5 Operation Description Figure 11. Behaviour of the high voltage current source at start-up VDD 2 mA VDDon VDDoff 3 mA VDD 15 mA DRAIN 1 mA 15 mA CVDD Ref. t Auxiliary primary winding UNDERVOLTAGE LOCK OUT LOGIC VIPer100 SOURCE Start up duty cycle ~ 12% FC00100 Figure 12.
PAGE 17
VIPer100A-E/ASP-E 5 Operation Description Figure 13.
PAGE 18
VIPer100A-E/ASP-E 5 Operation Description Figure 14. Oscillator For R t > 1.2kΩ and Ct ≤ 40KHz VDD Rt O SC 550 2.3 F SW = ----------- ⋅ ⎛ 1 – --------------------⎞ R t – 150⎠ RtCt ⎝ Ct ~360Ω CLK FC 00050 Ct Forbidden area 880 Ct(nF) = 22nF Fsw(kHz) 15nF Forbidden area 40kHz Fsw Oscillator frequency vs Rt and Ct FC00030 1,000 Ct = 1.5 nF 500 Frequency (kHz) Ct = 2.7 nF 300 Ct = 4.
PAGE 19
VIPer100A-E/ASP-E 5 Operation Description Figure 15. Error Amplifier frequency Response FC00200 60 RCOMP = +∞ Voltage Gain (dB) RCOMP = 270k 40 RCOMP = 82k RCOMP = 27k 20 RCOMP = 12k 0 (20) 0.001 0.01 0.1 1 10 Frequency (kHz) 100 1,000 Figure 16. Error Amplifier Phase Response FC00210 200 RCOMP = +∞ 150 RCOMP = 270k Phase (°) RCOMP = 82k RCOMP = 27k 100 RCOMP = 12k 50 0 (50) 0.001 0.01 0.
PAGE 20
VIPer100A-E/ASP-E 5 Operation Description Figure 17. Mixed Soft Start and Compensation Figure 18. Latched Shut Down D2 U1 VIPER100 VDD U1 VIPER100 D3 R1 DRAIN VDD OSC 13V COMP DRAIN Q2 R3 + - OSC SOURCE + 13V D1 COMP SOURCE AUXILIARY WINDING R3 R2 R1 C4 R2 + C3 R4 Shutdown + C2 C1 D1 Q1 FC00131 FC00110 Figure 19. Typical Compensation Network Figure 20.
PAGE 21
VIPer100A-E/ASP-E 6 Electrical Over Stress 6 Electrical Over Stress 6.1 Electrical Over Stress Ruggedness The VIPer may be submitted to electrical over-stress, caused by violent input voltage surges or lightning. Following the Layout Considerations is sufficient to prevent catastrophic damages most of the time. However in some cases, the voltage surges coupled through the transformer auxiliary winding can exceed the VDD pin absolute maximum rating voltage value.
PAGE 22
VIPer100A-E/ASP-E 7 Layout 7 Layout 7.1 Layout Considerations Some simple rules insure a correct running of switching power supplies. They may be classified into two categories: – Minimizing power loops: The switched power current must be carefully analysed and the corresponding paths must be as small an inner loop area as possible.
PAGE 23
VIPer100A-E/ASP-E 8 8 Package Mechanical Data Package Mechanical Data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark.
PAGE 24
VIPer100A-E/ASP-E 8 Package Mechanical Data Pentawatt HV Mechanical Data mm. inch Dim Min. Typ. Maw. Min. Typ. A 4.30 4.80 0.169 0.189 C 1.17 1.37 0.046 0.054 D 2.40 2.80 0.094 0.11 E 0.35 0.55 0.014 0.022 F 0.60 0.80 0.024 0.031 G1 4.91 5.21 0.193 0.205 G2 7.49 7.80 0.295 0.307 H1 9.30 9.70 0.366 0.382 H2 10.40 0.409 H3 10.05 10.40 L 15.60 17.30 6.14 0.681 L1 14.60 15.22 0.575 0.599 L2 21.20 21.85 0.835 0.860 L3 22.20 22.82 0.874 0.
PAGE 25
VIPer100A-E/ASP-E 8 Package Mechanical Data Pentawatt HV 022Y ( Vertical High Pitch ) Mechanical Data mm. inch Dim Min. Typ. Maw. Min. Typ. Max. A 4.30 4.80 0.169 0.189 C 1.17 1.37 0.046 0.054 D 2.40 2.80 0.094 0.110 E 0.35 0.55 0.014 0.022 F 0.60 0.80 0.024 0.031 G1 4.91 5.21 0.193 0.205 G2 7.49 7.80 0.295 0.307 H1 9.30 9.70 0.366 0.382 H2 10.40 0.409 H3 10.05 10.40 0.396 0.409 L 16.42 17.42 0.646 0.686 L1 14.60 15.22 0.575 0.599 L3 20.
PAGE 26
VIPer100A-E/ASP-E 8 Package Mechanical Data Figure 25. Pentawatt HV Tube Shipment ( no suffix ) Base Q.ty 50 Bulk Q.ty 1000 Tube length ( ± 0.5 ) 532 A 18 B 33.1 C ( ± 0.1) 1 All dimensions are in mm.
PAGE 27
VIPer100A-E/ASP-E 8 Package Mechanical Data PowerSO-10 MECHANICAL DATA mm DIM. MIN. inch MAX. MIN. A 3.35 TYP. 3.65 0.132 0.144 A1 0.00 0.10 0.000 0.004 B 0.40 0.60 0.016 0.024 C 0.35 0.55 0.013 0.022 D 9.40 9.60 0.370 0.378 D1 7.40 7.60 0.291 e 1.27 TYP. MAX. 0.300 0.050 E 9.30 9.50 0.366 0.374 E1 7.20 7.40 0.283 0.291 E2 7.20 7.60 0.283 0.300 E3 6.10 6.35 0.240 0.250 E4 5.90 6.10 0.232 0.240 F 1.25 1.35 0.049 h 0.50 0.053 0.
PAGE 28
VIPer100A-E/ASP-E 8 Package Mechanical Data PowerSO-10™ SUGGESTED PAD LAYOUT TUBE SHIPMENT (no suffix) 14.6 - 14.9 CASABLANCA B 10.8 - 11 MUAR C 6.30 C A A 0.67 - 0.73 1 9.5 2 3 4 5 10 9 B 0.54 - 0.6 All dimensions are in mm. 8 7 1.27 Base Q.ty Bulk Q.ty Tube length (± 0.5) 6 Casablanca Muar 50 50 1000 1000 532 532 A B C (± 0.1) 10.4 16.4 4.9 17.2 TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.
PAGE 29
VIPer100A-E/ASP-E 9 9 Order Codes Order Codes PENTAWATT HV PENTAWATT HV (022Y) PowerSO-10 VIPer100A-E VIPer100A-22-E VIPer100ASP-E 29/31
PAGE 30
VIPer100A-E/ASP-E 10 Revision history 10 Revision history Date Revision 23-Sep-2005 1 30/31 Changes Initial release.
PAGE 31
VIPer100A-E/ASP-E 10 Revision history Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice.