Datasheet

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November 2007 Rev 1 1/10

USBULC6-2M6

Ultra large bandwidth ESD protection

Features

■ 2 data line 15 kV ESD protection

■ Protects 5 V V

BUS

when applicable

■ Ultra low capacitance: 0.65 pF at F = 240 MHz

■ Very low leakage current: 0.5 µA max.

■ Fast response time compared with varistors

■ µQFN 6 lead package

■ RoHS compliant

Benefits

■ ESD protection of V

BUS

(when applicable)

■ High bandwidth to minimize impact on data

signal quality

■ Low PCB space occupation

■ Low leakage current profides longer operation

of battery powered devices

■ Higher reliability offered by monolithic

integration

Complies with these standards:

■ IEC 61000-4-2 level 4

– 15 kV air discharge

– 8 kV contact discharge

Applications

■ USB 2.0 ports including Hi-Speed USB ports

up to 480 Mb/s as well as full and low speed

USB ports

■ Ethernet port: 10/100/1000 Mb/s

■ Video line protection

■ Portable electronics

Figure 1. Functional diagram (top view)

Description

The USBULC6-2M6 is a monolithic, application

specific discrete device dedicated to ESD

protection of high speed interfaces.

Its ultra low line capacitance provides high

bandwidth and secures a high level of signal

integrity without compromizing the protection of

downstream sensitive chips against the most

stringent characterized ESD strikes.

µQFN

(pin view)

www.st.com

Summary of content (10 pages)

PAGE 1
USBULC6-2M6 Ultra large bandwidth ESD protection Features ■ 2 data line 15 kV ESD protection ■ Protects 5 V VBUS when applicable ■ Ultra low capacitance: 0.65 pF at F = 240 MHz ■ Very low leakage current: 0.5 µA max. ■ Fast response time compared with varistors ■ µQFN 6 lead package ■ RoHS compliant Benefits µQFN (pin view) Figure 1.
PAGE 2
Characteristics 1 USBULC6-2M6 Characteristics Table 1. Absolute ratings Symbol Parameter VPP Peak pulse voltage Tstg Storage temperature range Value Unit ±15 ±15 ±25 kV -55 to +150 °C IEC 61000-4-2 air discharge IEC 61000-4-2 contact discharge MIL STD883G-Method 3015-7 Tj Maximum junction temperature 150 °C TL Lead solder temperature (10 seconds duration) 260 °C Table 2. Electrical characteristics (Tamb = 25 °C) Value Symbol Parameter Test conditions Unit Min.
PAGE 3
USBULC6-2M6 Figure 2. Characteristics Line capacitance versus frequency Figure 3. (typical values) C(fF) Relative variation of leakage current versus junction temperature (typical values) IRM[Tj] / IRM[Tj=25°C] 1000.0 5 900.0 4 800.0 700.0 3 I/O - GND 600.0 500.0 400.0 2 I/O – I/O 300.0 200.0 100.0 F(GHz) Tj(°C) 0.0 0 1 Figure 4. 2 3 Attenuation measurement 1 25 50 Figure 5. 75 100 125 Crosstalk measurements dB S21(db) 0.00 0.00 - 4.00 - 30.00 - 8.00 - 60.00 - 12.
PAGE 4
Characteristics Figure 8. USBULC6-2M6 Remaing voltage on VBUS after the USBULC6-2M6 during positive ESD surge (15 kV Air) 10V/Div Figure 9. Remaing voltage on VBUS after the USBULC6-2M6 during negative ESD surge (15 kV Air) 10V/Div 100ns/Div 100ns/Div Figure 10. Eye diagram PCB only 400 mV amplitude, F = 480 Mbps Figure 11. Eye diagram PCB + USBULC6-2M6 400 mV amplitude, F = 480 Mbps Horiz: 350 ps/div Vert: 100 mV/div Horiz: 350 ps/div Vert: 100 mV/div Figure 12.
PAGE 5
USBULC6-2M6 2 Application example Application example Figure 13. One differential line D+ I/O1 To GND plane I/O2 1 6 2 5 3 4 I/O1 100 nF I/O2 D- 3 Ordering information scheme Figure 14.
PAGE 6
Package information 4 USBULC6-2M6 Package information ● Epoxy meets UL94, V0 In order to meet environmental requirements, ST (also) offers these devices in ECOPACK® packages. ECOPACK® packages are Lead-free. The category of second level Interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Table 3.
PAGE 7
USBULC6-2M6 Recommendation on PCB assembly 5 Recommendation on PCB assembly 5.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness) Figure 16. Stencil opening dimensions. L T b) W General Design Rule Stencil thickness (T) = 75 ~ 125 µm W Aspect Ratio = ----- ≥ 1.5 T L×W Aspect Area = ---------------------------- ≥ 0.66 2T ( L + W ) 2. 5.
PAGE 8
Recommendation on PCB assembly 5.3 5.4 5.5 USBULC6-2M6 Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering 3. Standard tolerance of ± 0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short.
PAGE 9
USBULC6-2M6 6 Ordering information Ordering information Table 4. Ordering information Order code Marking Package Weight Base qty Delivery mode USBULC6-2M6 T(1) µQFN 2.2 mg 3000 Tape and reel 1. The marking can be rotated by 90° to diferentiate assembly location 7 Revision history Table 5.
PAGE 10
USBULC6-2M6 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.