Datasheet

Electrical characteristics TSV912H, TSV912AH
4/16 Doc ID 17688 Rev 1
F
u
Unity gain frequency R
L
=2kΩ, C
L
= 100pF 7.2 MHz
φm Phase margin R
L
=2kΩ, C
L
= 100pF 45 Degrees
G
m
Gain margin R
L
=2kΩ, C
L
= 100pF 8 dB
SR Slew rate
R
L
=2kΩ, C
L
=100pF, A
v
=1
T=25°C
T
min
< T < T
max
4.5
3.5
V/μs
e
n
Equivalent input noise voltage f= 10kHz 21
THD+e
n
Total harmonic distortion
G=1, f=1kHz, R
L
=2kΩ, Bw= 22kHz,
V
icm
=(V
CC
+1)/2, V
out
=1.1V
pp
0.001 %
1. Guaranteed by design.
Table 3. Electrical characteristics at V
CC+
= +2.5 V with V
CC-
= 0 V, V
icm
= V
CC
/2, R
L
connected
to V
CC
/2, T = 25°C (unless otherwise specified) (continued)
Symbol Parameter Conditions Min. Typ. Max. Unit
nV
Hz
------------
Table 4. Electrical characteristics at V
CC+
= +3.3 V with V
CC-
= 0 V, V
icm
= V
CC
/2, R
L
connected
to V
CC
/2, T = 25°C (unless otherwise specified)
Symbol Parameter Conditions Min. Typ. Max. Unit
DC performance
V
io
Input offset voltage
TSV912H, T=25°C
TSV912H, T
min
< T < T
max
0.1 4.5
7.5
mV
TSV912AH, T=25°C
TSV912AH, T
min
< T < T
max
1.5
3
DV
io
Input offset voltage drift
-40°C < T < +125°C
+125°C < T < +150°C
2
20
μV/°C
I
io
Input offset current
V
out
=V
CC
/2
T=25°C
T
min
< T < T
max
110
(1)
5
pA
nA
I
ib
Input bias current
V
out
=V
CC
/2
T=25°C
T
min
< T < T
max
110
(1)
5
pA
nA
CMR
Common mode rejection ratio
20 log (ΔV
ic
/ΔV
io
)
0V to 3.3V, V
out
= 1.65V
T=25°C
T
min
< T < T
max
60
55
78 dB
A
vd
Large signal voltage gain
R
L
=10kΩ, V
out
= 0.5V to 2.8V
T=25°C
T
min
< T < T
max
80
70
90 dB
V
CC
-V
OH
High level output voltage
R
L
=10kΩ, T=25°C
R
L
=10kΩ, T
min
< T < T
max
R
L
=600Ω, T=25°C
R
L
=600Ω, T
min
< T < T
max
15
45
40
60
150
250
mV