Datasheet

Electrical characteristics TSV6390, TSV6390A, TSV6391, TSV6391A
6/22 Doc ID 17118 Rev 1
Table 5. V
CC+
= +3.3 V, V
CC-
= 0 V, V
icm
= V
CC
/2, T
amb
= 25° C, R
L
connected to V
CC
/2
(unless otherwise specified)
Symbol Parameter Conditions Min. Typ. Max. Unit
DC performance
V
io
Offset voltage
TSV6390-TSV6391
TSV6390A-TSV6391A
3
0.5
mV
T
min
< T
op
< T
max
TSV6390-TSV6391
TSV6390A-TSV6391A
4.5
2
DV
io
Input offset voltage drift 2 μV/°C
I
io
Input offset current
(1)
110
pA
T
min
< T
op
< T
max
1100
I
ib
Input bias current
(1)
110
pA
T
min
< T
op
< T
max
1100
CMR
Common mode rejection
ratio 20 log (ΔV
ic
/ΔV
io
)
0V to 3.3V, V
out
= 1.65 V 57 79
dB
T
min
< T
op
< T
max
53
A
vd
Large signal voltage gain
R
L
=10kΩ, V
out
= 0.5 V to 2.8 V 88 98
dB
T
min
< T
op
< T
max
83
V
OH
High level output voltage
R
L
=10kΩ 35 6
mV
T
min.
< T
op
< T
max
50
V
OL
Low level output voltage
R
L
=10kΩ 735
mV
T
min
< T
op
< T
max
50
I
out
I
sink
V
out
= 3.3 V 23 45
mA
T
min
< T
op
< T
max
20 42
I
source
V
out
= 0 V 23 38
mA
T
min
< T
op
< T
max
20
I
CC
Supply current
SHDN = V
CC
No load, V
out
=V
CC
/2 43 55 64 µA
T
min
< T
op
< T
max
66 µA
AC performance
GBP Gain bandwidth product R
L
=10kΩ, C
L
= 100 pF 2.2 MHz
Gain Minimum gain for stability
Phase margin = 60°, R
f
= 10 kΩ,
R
L
=10kΩ, C
L
=20pF,
+4
-3
V/V
SR Slew rate
R
L
=10kΩ, C
L
= 100 pF,
V
out
= 0.5 V to 2.8 V
0.9 V/μs
e
n
Equivalent input noise
voltage
f=1kHz 65
1. Guaranteed by design.
nV
Hz
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