Datasheet

TSV63x, TSV63xA Electrical characteristics
Doc ID 15688 Rev 5 7/30
Table 6. V
CC+
= +3.3 V, V
CC-
= 0 V, V
icm
= V
CC
/2, T
amb
= 25° C, R
L
connected to V
CC
/2
(unless otherwise specified)
Symbol Parameter Conditions Min. Typ. Max. Unit
DC performance
V
io
Offset voltage
TSV63x
TSV63xA
TSV633AIST - MiniSO10
3
0.8
1
mV
T
min
< T
op
< T
max
- TSV63x
T
min
< T
op
< T
max
- TSV63xA
T
min
< T
op
< T
max
- TSV633AIST
4.5
2
2.2
ΔV
io
/ΔT Input offset voltage drift 2 μV/°C
I
io
Input offset current
V
out
= V
CC
/2 1 10
(1)
pA
T
min
< T
op
< T
max
1 100
I
ib
Input bias current
V
out
= V
CC
/2 1 10
(1)
T
min
< T
op
< T
max
1 100
CMR
Common mode rejection
ratio 20 log (ΔV
ic
/ΔV
io
)
0 V to 3.3 V, V
out
= 1.65 V 57 79
dB
T
min
< T
op
< T
max
53
A
vd
Large signal voltage gain
R
L
= 10 kΩ, V
out
= 0.5 V to 2.8 V 88 98
T
min
< T
op
< T
max
83
V
OH
High level output voltage
R
L
= 10 kΩ
T
mi.
< T
op
< T
max
35
50
5
mV
V
OL
Low level output voltage
R
L
= 10 kΩ
T
min
< T
op
< T
max
435
50
I
out
I
sink
V
o
= 3.3 V 23 45
mA
T
min
< T
op
< T
max
20
I
source
V
o
= 0 V 23 38
T
min
< T
op
< T
max
20
I
CC
Supply current
(per channel)
No load, V
out
= 1.75 V 43 55 64
µA
T
min
< T
op
< T
max
66
AC performance
GBP Gain bandwidth product
R
L
= 2 kΩ, C
L
= 100 pF,
f = 100 kHz
710 860 kHz
φm Phase margin R
L
= 2 kΩ, C
L
= 100 pF 46 Degrees
G
m
Gain margin R
L
= 2 kΩ, C
L
= 100 pF 13 dB
SR Slew rate R
L
= 2 kΩ, C
L
= 100 pF, A
V
= 1 0.22 0.29 V/μs
1. Guaranteed by design.