Datasheet

Electrical characteristics TSV6290, TSV6290A, TSV6291, TSV6291A
6/23 Doc ID 17117 Rev 1
Table 5. V
CC+
= +3.3 V, V
CC-
= 0 V, V
icm
= V
CC
/2, T
amb
= 25° C, R
L
connected to V
CC
/2
(unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
DC performance
V
io
Offset voltage
TSV6290-TSV6291
TSV6290A-TSV6291A
4
0.8
mV
T
min
< T
op
< T
max
TSV6290-TSV6291
TSV6290A-TSV6291A
6
2
DV
io
Input offset voltage drift 2 μV/°C
I
io
Input offset current
(1)
110pA
T
min
< T
op
< T
max
1 100 pA
I
ib
Input bias current
(1)
110pA
T
min
< T
op
< T
max
1 100 pA
CMR
Common mode rejection ratio
20 log (ΔV
ic
/ΔV
io
)
0V to 3.3V, V
out
= 1.65 V 57 79 dB
T
min
< T
op
< T
max
53 dB
A
vd
Large signal voltage gain
R
L
=10 kΩ, V
out
= 0.5 V to 2.8 V 81 98 dB
T
min
< T
op
< T
max
76 dB
V
OH
High level output voltage
R
L
=10kΩ 35 5
mV
T
min
< T
op
< T
max
50
V
OL
Low level output voltage
R
L
=10kΩ 435
mV
T
min
< T
op
< T
max
50
I
out
Isink
V
out
= 5 V 23 45
mA
T
min
< T
op
< T
max
20
Isource
V
out
= 0 V 23 38
mA
T
min
< T
op
< T
max
20
I
CC
Supply current (per operator)
No load, V
out
=2.5V 26 33 µA
T
min
< T
op
< T
max
35 µA
AC performance
GBP Gain bandwidth product R
L
=10kΩ, C
L
= 100 pF 1.2 MHz
Gain Minimum gain for stability
Phase margin = 60°, R
f
= 10 kΩ,
R
L
=10kΩ, C
L
=20pF
+4
-3
V/V
SR Slew rate
R
L
=10kΩ, C
L
= 100 pF,
V
out
= 0.5 V to 2.8 V
0.4 V/μs
1. Guaranteed by design.