Datasheet

TSM108
3/13
ELECTRICAL CHARACTERISTICS
T
amb
= 25°C, V
CC
+ 12V (unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
CURRENT CONSUMPTION
I
CC
Current Consumption 4 7 mA
STANDBY
I
stby
Current Consumption in Standby Mode 150 µA
V
sh
Input Standby Voltage High Impedance Internal Pull up resistor.
Stby pin should be left
open
2V
V
sl
Input Standby Voltage Low 0.8 V
OSCILLATOR
F
OSC
Frequency of the Oscilator C
OSC
= 220pF 70 100 130 kHz
VOLTAGE CONTROL
1) 2)
1. V
ref
parameter indicates global precision of the voltage control loop.
2. Control Gain : A
v
= 95dB ; Input Resistance : R
in
= infinite ; Output Resistance : R
out
= 700MΩ ; Output Source/Sink Current :
I
so
, I
si
= 150µA ; Recommended values for the compensation network are : 22nF & 22kΩ in series between output and ground.
V
ref
Voltage Control Reference T
amb
= 25°C
-25°C < T
amb
< 85°C
2.450
2.520
2.590
V
CURRENT CONTROL
3) 4) 5)
3. V
sense
parameter indicated global precision of the current control loop.
4. Control Gain : A
v
= 105dB ; Input Resistance : R
in
=380kΩ ; Output Resistance : R
out
= 105MΩ ; Output Source/Sink Current :
I
so
, I
si
= 150µA ; Recommended values for the compensation network are : 22nF & 22kΩ in series between output and ground.
5. A current foldback function is implemented thanks to a systematic -6mV negative offset on the current amplifier inputs which
protects the battery from over charging current under low battery voltage conditiions, or output short circuit conditions.
V
sense
Current Control Reference Voltage T
amb
= 25°C
-25°C < T
amb
< 85°C
196
191
206 216
221
mV
GATE DRIVE - P CHANNEL MOSFET DRIVE
I
sink
Sink Current - Switch ON T
amb
= 25°C
-25°C < T
amb
< 85°C
15
40 mA
I
source
Source Current - Swith OFF T
amb
= 25°C
-25°C < T
amb
< 85°C
30
80 mA
C
load
Input Capacitance of the PMOSFET
6)
6. The Gate Drive output stage has been optimized for PMosfets with input capacitance equal to Cload. A bigger Mosfet (with input
capacitance higher than Cload) can be used with TSM108, but the gate drive performances will be reduced (in particular when
reaching the Dmax. PWM mode).
11.5nF
PWM
∆
max.
Maximum Duty Cycle of the PWM function 95 100 %
UVLO
UV
Under Voltage Lock Out
7)
7. The given limits comprise the hysteresis (UV
hyst
).
-25°C < T
amb
< 85°C 8 9 V
UV
hyst
UVLO Voltage Hysteresis - low to high 200 mV
R
uvl
Upper Resistor of UVLO bridge
8)
8. It is possible to modify the UVLO and OVLO limits by adding a resistor (to ground or to V
CC
) on the pins UV and OV.
The internal values of the resistor should be taken into account.
T
amb
= 25°C 184 kΩ
R
uvl
Lower Resistor of UVLO bridge (see note 8) T
amb
= 25°C 76.5 kΩ
OVLO
OV Over Voltage Lock Out (see note 7) -25°C < T
amb
< 85°C 32 35 V
OV
hyst
OVLO Voltage Hysteresis - low to high 400 mV
R
ovl
Upper Resistor of OVLO bridge (see note 8) T
amb
= 25°C 275 kΩ
R
ovl
Lower Resistor of OVLO bridge (see note 8) T
amb
= 25°C 23.2 kΩ