Datasheet

Electrical characteristics TS914, TS914A
6/17 Doc ID 4475 Rev 8
Table 5. V
CC
+
= 10 V, V
DD
= 0 V, R
L
, C
L
connected to V
CC
/2, T
amb
= 25 °C
(unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
io
Input offset voltage (V
icm
=
V
o
= V
CC
/2)
TS914
TS914A
T
min
T
amb
T
max,
TS914
T
min
T
amb
T
max,
TS914A
10
5
12
7
mV
ΔV
io
Input offset voltage drift 5 μV/°C
I
io
Input offset current
(1)
T
min
T
amb
T
max
1 100
200
pA
I
ib
Input bias current
(1)
T
min
T
amb
T
max
1 150
300
pA
CMR
Common mode rejection
ratio
V
icm
= 3 to 7 V, V
o
= 5 V
V
icm
= 0 to 10 V, V
o
= 5 V
90
75
dB
SVR Supply voltage rejection ratio V
CC+
= 5 to 10 V, V
o
= V
CC
/2 90 dB
A
vd
Large signal voltage gain
R
L
= 10 kΩ, V
o
= 2.5 V to 7.5 V
T
min
T
amb
T
max
15
10
60
V/mV
V
OH
High level output voltage
V
id
= 1 V,
R
L
= 10 kΩ
R
L
= 600 Ω
R
L
= 100 Ω
V
id
= 1 V, T
min
T
amb
T
max
R
L
= 10 kΩ
R
L
= 600 Ω
9.85
9
9.8
9
9.95
9.35
7.8
V
V
OL
Low level output voltage
V
id
= -1 V,
R
L
= 10 kΩ
R
L
= 600 Ω
R
L
= 100 Ω
V
id
= -1 V, T
min
T
amb
T
max
R
L
= 10 kΩ
R
L
= 600 Ω
50
650
2300
180
800
150
900
mV
I
o
Output short-circuit current V
id
= ±1 V 60 mA
I
CC
Supply current / operator
A
VCL
= 1, no load,
T
min
T
amb
T
max
400 600
700
μA
GBP Gain bandwidth product
A
VCL
= 100, R
L
=10kΩ, C
L
= 100 pF,
f=100kHz
1.4 MHz
SR Slew rate
A
VCL
=1, R
L
=10kΩ, C
L
= 100 pF,
V
i
=2.5Vto7.5V
1V/μs
φ
m
Phase margin R
s
= 100 Ω, f = 1 kHz 40 °
e
n
Equivalent input noise
voltage
R
s
= 100 Ω, f = 1 kHz 30 nV/Hz
THD Total harmonic distortion
A
VCL
=1, R
L
=10kΩ, C
L
= 100 pF,
V
o
= 4.75 to 5.25 V, f = 1 kHz
0.02 %
C
in
Input capacitance 1.5 pF