Datasheet
Table Of Contents
- 1 Absolute maximum ratings and operating conditions
- 2 Electrical characteristics
- Table 3. Electrical characteristics at VCC = +5 V, VDD = 0 V, Vicm = VCC/2, Tamb = 25 °C, RL connected to VCC/2 (unless otherwise specified)
- Table 4. Electrical characteristics at VCC = +3.3 V, VDD = 0 V, Vicm = VCC/2, Tamb = 25 °C, RL connected to VCC/2 (unless otherwise specified)
- Table 5. Electrical characteristics at VCC = +2.7 V VDD = 0 V, Vicm = VCC/2, Tamb = 25 °C, RL connected to VCC/2 (unless otherwise specified)
- Figure 1. Input offset voltage distribution for Vicm£ VCC-1.2 V at T=25 °C
- Figure 2. Input offset voltage distribution vs. temperature for Vicm£ VCC-1.2 V
- Figure 3. Input offset voltage distribution vs. temperature for Vicm ³ VCC-0.8 V
- Figure 4. Input offset voltage distribution for Vicm £ VCC-1.2 V at T=25 °C after HTB
- Figure 5. Input offset voltage distribution for Vicm £ VCC-1.2 V at T=25 °C after THB
- Figure 6. Input offset voltage vs. input common mode voltage at T=25 °C
- Figure 7. Supply current vs. input common mode voltage in closed loop configuration at VCC=5 V
- Figure 8. Supply current vs. supply voltage at Vicm=VCC/2
- Figure 9. Supply current vs. input common mode voltage in follower configuration at VCC=2.7 V
- Figure 10. Supply current vs. input common mode voltage in follower configuration at VCC=5 V
- Figure 11. Output current vs. supply voltage at Vicm=VCC/2
- Figure 12. Output current vs. output voltage at VCC=2.7 V
- Figure 13. Output current vs. output voltage at VCC=5 V
- Figure 14. Positive and negative slew rate vs. supply voltage
- Figure 15. Voltage gain and phase vs. frequency at VCC=5 V and Vicm=2.5 V at T=25 °C
- Figure 16. Voltage gain and phase vs. frequency at VCC=5 V and Vicm=2.5 V at T=-40 °C
- Figure 17. Voltage gain and phase vs. frequency at VCC=5 V and Vicm=2.5 V at T=125 °C
- Figure 18. Closed loop gain in voltage follower configuration for different capacitive load at T=25 °C
- Figure 19. Gain margin according to the output load, at VCC=5 V and T=25 °C
- Figure 20. Phase margin according to the output load, at VCC=5 V and T=25 °C
- Figure 21. Gain margin vs. output current, at VCC=5 V and T=25 °C
- Figure 22. Phase margin vs. output current, at VCC=5 V and T=25 °C
- Figure 23. Phase and gain margins vs capacitive load at = 25 °C
- Figure 24. Distortion + noise vs. output voltage
- Figure 25. Distortion + noise vs. frequency
- Figure 26. Noise vs. frequency
- 3 Application note
- 4 Package information
- 5 Ordering information
- 6 Revision history

This is information on a product in full production.
March 2013 DocID10958 Rev 6 1/20
20
TS507
High precision rail-to-rail operational amplifier
Datasheet - production data
Features
• Ultra low offset voltage: 25 µV typ, 100 µV max
• Rail-to-rail input/output voltage swing
• Operates from 2.7 V to 5.5 V
• High speed: 1.9 MHz
• 45° phase margin with 100 pF
• Low consumption: 0.8 mA at 2.7 V
• Very large signal voltage gain: 131 dB
• High-power supply rejection ratio: 105 dB
• Very high ESD protection 5kV (HBM)
• Latchup immunity
• Available in SOT23-5 micropackage
• Automotive qualification
Applications
• Battery-powered applications
• Portable devices
• Signal conditioning
• Medical instrumentation
Description
The TS507 is a high performance rail-to-rail
input/output amplifier with very low offset voltage.
This amplifier uses a new trimming technique that
yields ultra low offset voltages without any need
for external zeroing.
The circuit offers very stable electrical
characteristics over the entire supply voltage
range, and is particularly intended for automotive
and industrial applications.
The TS507 is housed in the space-saving 5-pin
SOT23 package, making it well suited for battery-
powered systems. This micropackage simplifies
the PC board design because of its ability to be
placed in small spaces (external dimensions are
2.8
mm x 2.9 mm).
VDD
VCC
1
2
3
5
4
8
7
6
N.C.
N.C.
Non Inverting Input
Inverting Input
Output
+
_
N.C.
VDD
VCC
1
2
3
5
4
8
7
6
N.C.
N.C.
Non Inverting Input
Inverting Input
Output
+
_
N.C.
1
2
3
5
4
VDD
VCC
Non Inverting Input Inverting Input
Output
1
2
3
5
4
VDD
VCC
Non Inverting Input Inverting Input
Output
Pin connections (top view)
SOT23-5
SO-8
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