TDA7498L 80 watt + 80 watt dual BTL class-D audio amplifier Features ■ 80 W + 80 W output power at THD = 10% with RL = 6 Ω and VCC = 32 V ■ 70 W + 70 W output power at THD = 10% with RL = 8 Ω and VCC = 34 V ■ Wide-range single-supply operation (14 - 36 V) ■ High efficiency (η = 90%) ■ Four selectable, fixed gain settings of nominally 25.6 dB, 31.6 dB, 35.1 dB and 37.
Contents TDA7498L Contents 1 2 3 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.
TDA7498L List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Internal block diagram (showing one channel only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin connections (top view, PCB view) . . . . . . . . . . . . . . .
List of tables TDA7498L List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. 4/27 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TDA7498L 1 Device block diagram Device block diagram Figure 1 shows the block diagram of one of the two identical channels of the TDA7498L. Figure 1.
Pin description TDA7498L 2 Pin description 2.1 Pinout Figure 2.
TDA7498L 2.2 Pin description Pin list Table 2.
Electrical specifications TDA7498L 3 Electrical specifications 3.1 Absolute maximum ratings Table 3. Absolute maximum ratings Symbol Parameter VCC_MAX DC supply voltage for pins PVCCA, PVCCB V -0.3 to 3.6 V Tj_MAX Operating junction temperature 0 to 150 °C Tstg Storage temperature -40 to 150 °C Stresses beyond those listed under “Absolute maximum ratings” make cause permanent damage to the device.
TDA7498L 3.4 Electrical specifications Electrical specifications Unless otherwise stated, the results in Table 6 below are given for the conditions: VCC = 32 V, RL (load) = 6 Ω, ROSC = R3 = 39 kΩ, C8 = 100 nF, f = 1 kHz, GV = 25.6 dB and Tamb = 25 °C. Table 6.
Electrical specifications Table 6. TDA7498L Electrical specifications (continued) Symbol Parameter fSW Switching frequency fSWR Output switching frequency Range VinH Digital input high (H) VinL Digital input low (L) Condition Internal oscillator With external oscillator AMUTE (2) Typ 310 330 - 400 250 - 400 2.3 - - - - 0.8 2.7 - - Pin STBY voltage low (L) - - 0.5 2.5 - - - - 0.8 Mute attenuation VMUTE < 0.8 V - 70 - V V 1.
TDA7498L 4 Characterization curves Characterization curves Figure 20 on page 18 shows the test circuit with which the characterization curves, shown in the next sections, were measured. Figure 3 below shows the PCB layout. 4.1 PCB layout Figure 3.
Characterization curves 4.2 TDA7498L Characterization curves Unless otherwise stated the measurements were made under the following conditions: VCC = 32 V, f = 1 kHz, GV = 25.6 dB, ROSC = 39 kΩ, COSC = 100 nF, Tamb = 25 °C 4.2.1 For RL = 6 Ω Figure 4. Output power vs. supply voltage Figure 5. THD vs. output power (1 kHz) 10 5 2 1 0.5 0.2 % 0.1 0.05 0.02 0.01 0.005 0.002 0.
TDA7498L Characterization curves Figure 6. THD vs. output power (100 Hz) 10 5 2 1 0.5 0.2 % 0.1 0.05 0.02 0.01 0.005 0.002 0.001 100m 200m 500m 1 2 5 10 20 50 90 W Figure 7. THD vs. frequency (1 W) 1 0.5 0.2 0.1 % 0.05 0.02 0.01 0.005 20 50 100 200 500 1k 2k 5k 10k 20k 1k 2k 5k 10k 20k Hz Figure 8. THD vs. frequency (100 mW) 1 0.5 0.2 % 0.1 0.05 0.02 0.
Characterization curves Figure 9. TDA7498L Frequency response +3 +2.5 +2 +1.5 +1 d B r A +0.5 +0 -0.5 -1 -1.5 -2 -2.5 -3 20 50 100 200 500 1k 2k 5k 10k 20k 1k 2k 5k 10k 20k Hz Figure 10. FFT performance (0 dBFS) +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz Figure 11.
TDA7498L 4.2.2 Characterization curves For RL = 8 Ω Figure 12. Output power vs. supply voltage Figure 13. THD vs. output power (1 kHz) 10 5 2 1 0.5 0.2 % 0.1 0.05 0.02 0.01 0.005 0.002 0.
Characterization curves TDA7498L Figure 14. THD vs. output power (100 Hz) 10 5 2 1 0.5 0.2 % 0.1 0.05 0.02 0.01 0.005 0.002 0.001 100m 200m 500m 1 2 5 10 1k 2k 1k 2k 20 50 90 5k 10k 20k 5k 10k 20k W Figure 15. THD vs. frequency (1 W) 1 0.5 0.2 0.1 % 0.05 0.02 0.01 0.005 20 50 100 200 500 Hz Figure 16. THD vs. frequency (100 mW) 1 0.5 0.2 % 0.1 0.05 0.02 0.
TDA7498L Characterization curves Figure 17. Frequency response +3 +2.5 +2 +1.5 +1 d B r A +0.5 +0 -0.5 -1 -1.5 -2 -2.5 -3 20 50 100 200 500 1k 2k 5k 10k 20k 1k 2k 5k 10k 20k 1k 2k 5k 10k 20k Hz Figure 18. FFT performance (0 dBFS) +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz Figure 19.
Applications information TDA7498L 5 Applications information 5.1 Applications circuit Figure 20. Applications circuit 1 C1 1uF 1nF SGND 1nF SGND J1 100nF SGND L- 4 L+ 1 R- 2 23 INNA PGNDA 14 R6 PGNDA 15 22R 27 R1 DIAG J7 Single-Ended 22R C6 3 FREQUENCY SHIFT Q1 C8 SYNC 1 R3 2 39K 100nF R13 68k ROSC SGND J5 30 GAIN0 VDDS C11 1uF SGND S2 MUTE 1uF S1 STBY SGND 120k + 33k + R2 2 SGND IC2 R8 IN L4931CZ33 3 C29 1 2.2uF 2 GND C9 SGND VCC 6.
TDA7498L Applications information The protection functions of the TDA7498L are enabled by pulling down the voltages of the STBY and MUTE inputs shown in Figure 21. The input current of the corresponding pins must be limited to 200 µA. Table 7. Mode settings Mode STBY MUTE (1) X (don’t care) Standby L Mute H (1) L Play H H 1. Drive levels defined in Table 6: Electrical specifications on page 9 Figure 21. Standby and mute circuits Standby 3.3 V 0V STBY R2 30 kΩ C7 2.2 µF R4 30 kΩ C15 2.
Applications information 5.3 TDA7498L Gain setting The gain of the TDA7498L is set by the two inputs, GAIN0 (pin 30) and GAIN1 (pin 31). Internally, the gain is set by changing the feedback resistors of the amplifier. Table 8. Gain settings GAIN0 5.4 GAIN1 Nominal gain, Gv (dB) L L 25.6 L H 31.6 H L 35.6 H H 37.6 Input resistance and capacitance The input impedance is set by an internal resistor Ri = 60 kΩ (typical). An input capacitor (Ci) is required to couple the AC input signal.
TDA7498L 5.5 Applications information Internal and external clocks The clock of the class-D amplifier can be generated internally or can be driven by an external source. If two or more class-D amplifiers are used in the same system, it is recommended that all devices operate at the same clock frequency. This can be implemented by using one TDA7498L as master clock, while the other devices are in slave mode, that is, externally clocked. The clock interconnect is via pin SYNCLK of each device.
Applications information 5.6 TDA7498L Output low-pass filter To avoid EMI problems, it may be necessary to use a low-pass filter before the speaker. The cutoff frequency should be larger than 22 kHz and much lower than the output switching frequency. It is necessary to choose the L and C component values depending on the loudspeaker impedance. Some typical values, which give a cutoff frequency of 27 kHz, are shown in Figure 25 and Figure 26 below. Figure 25.
TDA7498L 5.7 Applications information Protection functions The TDA7498L is fully protected against overvoltages, undervoltages, overcurrents and thermal overloads as explained here. Overvoltage protection (OVP) If the supply voltage exceeds the value for VOVP given in Table 6: Electrical specifications on page 9 the overvoltage protection is activated which forces the outputs to the high-impedance state. When the supply voltage falls back to within the operating range, the device restarts.
Package mechanical data 6 TDA7498L Package mechanical data The TDA7498L comes in a 36-pin PowerSSO package with exposed pad up. Figure 28 shows the package outline and Table 10 gives the dimensions. Table 10. PowerSSO-36 EPU dimensions Dimensions in mm Dimensions in inches Symbol Min Typ Max Min Typ Max A 2.15 - 2.45 0.085 - 0.096 A2 2.15 - 2.35 0.085 - 0.093 a1 0 - 0.10 0 - 0.004 b 0.18 - 0.36 0.007 - 0.014 c 0.23 - 0.32 0.009 - 0.013 D 10.10 - 10.50 0.
TDA7498L Figure 28.
Revision history 7 TDA7498L Revision history Table 11. 26/27 Document revision history Date Revision Changes 04-Dec-2009 1 Initial release.
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