TDA7493 3-watt + 3-watt dual BTL class-D audio amplifier Features 3.0 W + 3.0 W of continuous output power with RL = 4 Ω, THD = 10%, VCC = 5 V (filterless) 2.8 W + 2.8 W of continuous output power with RL = 4 Ω, THD = 10%, VCC = 5 V (with filter) Single supply voltage range 3.0 V to 5.5 V High efficiency (η = 83%) Four selectable, fixed gain settings of 6 dB, 12 dB, 15.
Contents TDA7493 Contents 1 Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Pin-out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TDA7493 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. TDA7493 block diagram (only one of two channels shown) . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin connection (top view) . . .
List of tables TDA7493 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. 4/30 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TDA7493 1 Device block diagram Device block diagram Figure 1 shows the block diagram of one of the two identical channels of the TDA7493. Figure 1.
Pin description TDA7493 2 Pin description 2.1 Pin-out Figure 2.
TDA7493 2.2 Pin description Pin list Table 2.
Applications circuit Figure 3.
TDA7493 Electrical specifications 4 Electrical specifications 4.1 Absolute maximum ratings Table 3. Absolute maximum rating Symbol 4.2 Negative value Parameter Positive value Unit VCC DC supply on pins PVCCPL, PVCCPR, PVCCNL, PVCCNR, SVCC -0.3 6 V VCC_STANDBY Standby DC supply on pins PVCCPL, PVCCPR, PVCCNL, PVCCNR, SVCC -0.3 7 V Vi Input on pins STANDBY, INNL, INPL, INNR, INPR, GAIN0, GAIN1 -0.
Electrical specifications Table 5. Symbol TDA7493 Electrical characteristics (continued) Parameter Condition Min Pd Dissipated power Po = 2.8 W + 2.8 W, THD = 10% - 1.1 - W η Efficiency Po = 2.8 W + 2.8 W, RL = 4 Ω - 83 - % THD Total harmonic distortion RL = 4 Ω, Po = 0.5 W - 0.05 - % Tj Thermal shut-down junction temperature - - 150 - °C - 6.0 - GAIN1 = high - 12.0 - GAIN1 = low - 15.6 - GAIN1 = high - 18.
TDA7493 Applications information 5 Applications information 5.1 Mode selection Pin STANDBY selects the operating mode, namely standby or play. z In standby mode, all the circuits are turned off and there is very low leakage current. z In play mode, the amplifiers are powered up. During the turn on/off sequence, there are four operational states: standby, pre-charge, mute and play.
Applications information 5.3 TDA7493 Input resistance and capacitance The input impedance is set by an internal resistor, Ri, of value 60 kΩ. An input coupling capacitor (Ci) is required on each input line. These two components together form a high-pass filter whose cutoff frequency is: fC = 1 / (2 * π * Ri * Ci) Figure 4. Input high-pass RC filter The value of Ci is chosen depending on the application and the speaker system.
TDA7493 5.4 Applications information Filterless modulation The modulation scheme of BTL is called unipolar PWM output. The differential output voltage changes between zero and +VCC or between zero and -VCC, as opposed to the traditional bipolar PWM output between +VCC and -VCC. The other advantage of this scheme effectively doubles the switching frequency of the differential output waveform.
Schematic for the filterless configuration PVCCPL SVCC 8 Doc ID 14570 Rev 6 8 OUTPL STANDBY INPL PGNDPL INNL PVCCNL ROSC TDA7493 OUTNL GAIN0 PGNDNL GAIN1 PVCCPR SYNCLK Applications information 14/30 Figure 7. OUTPR INPR PGNDPR INNR PVCCNR OUTNR SVR SGND PGNDNR Table 8.
TDA7493 5.5 Applications information Internal clock and external clock The clock of the class-D amplifier can be generated internally or it can be synchronous with the external clock. If two or more class-D amplifiers are used in the same system, it is better to have all devices working at the same frequency. This is realized by using one TDA7493 as clock master and the others as slaves. All SYNCLK pins are connected together as shown in Figure 8.
Applications information 5.6 TDA7493 Output low-pass filter To avoid EMI problems, a low-pass filter can be inserted before the speaker. The cut-off frequency of the filter should be higher than 22 kHz and much lower than the switching frequency. The component values of the filter vary according to the speaker impedance. A typical LC output filter for a speaker impedance of 8 Ω and with a cut-off frequency of 27 kHz is shown in Figure 9. Figure 9. Typical LC filter for 8 Ω speaker OUTP 33 µH 0.
TDA7493 5.7 Applications information Protection function The TDA7493 has four types of protection: overvoltage (OV), undervoltage (UV), thermal (OT) and short circuit (SC): z overvoltage protection (OVP) for the supply VCC > 6 V z undervoltage protection (UVP) for the supply VCC < 3 V z thermal protection (OTP) for the junction temperature Tj > 155 °C z short-circuit protection (SCP) across the load (tested at VCC = 5.0 V).
Applications information 5.8.1 TDA7493 Single-ended input application To use the device with a single-ended source, one input is AC connected to ground (via a capacitor) and the other input is connected to the audio source. This is designed as a fully differential input. The input scheme is shown in Figure 12. However, to avoid the start-up pop noise, it is important to equalize, as much as possible, the charging currents in the positive and negative inputs.
TDA7493 Applications information The disadvantages of the anti-pop configuration are given below: z The input impedance or the load of audio source is no longer 2 * Rin as in the case of differential input configuration but R0. It means the load effect should be considered during the application design. At this point, bigger R0 is better because of the lower load effect.
Electrical characterization curves TDA7493 6 Electrical characterization curves 6.1 For the configuration with LC filter z Test setup as given in Figure 3 on page 8 z Test conditions VCC = 5 V, C20 = 10 µF, RL = 4 Ω, LC filter 15 µH, 470 nF Figure 15. THD vs output power at 1 kHz THD (%) 10 5 2 1 d B r 0.5 0.2 A 0.1 0.05 0.02 0.01 0.005 0.002 0.001100m 200m 300m 400m 500m 700m 1 2 3 1 2 3 Po (W) Figure 16. THD vs output power at 100 Hz 10 THD 5 (%) 2 1 0.5 0.2 0.1 0.05 0.02 0.
TDA7493 Electrical characterization curves Figure 18. THD vs frequency at 1 W 10 THD 5 (%) 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 10k 20k 20k Frequency Figure 19. Output frequency response at 1 W +2 Ampl (dB) +1 -0 -1 -2 -3 -4 -5 20 50 100 200 500 1k 2k 5k 50k Frequency (Hz) Figure 20.
Electrical characterization curves TDA7493 Figure 21. FFT (0 dB) FFT (dB) +10 +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 1k 2k 5k 10k 20k 2k 5k 10k 20k Frequency (Hz) Figure 22.
TDA7493 6.2 Electrical characterization curves For the configuration without filter z Test setup as given in Figure 7 on page 14 z Test conditions VCC = 5 V, C20 = 10 µF, RL = 4 Ω + 270 µH, no LC filter Figure 23. THD vs output power at 1 kHz THD (%) 10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 100m 200m 300m 400m 600m 800m 1 2 3 4 Po (W) Figure 24. THD vs output power at 100 Hz 10 THD (%) 5 2 1 0.5 0.2 0.1 0.05 0.02 0.
Electrical characterization curves TDA7493 Figure 26. THD vs frequency at 1 W 10 THD (%) 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k frequency (Hz) Figure 27. Frequency response at 1 W Ampl (dB) +2 +1 -0 -1 -2 -3 -4 -5 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 50k frequency (Hz) Figure 28.
TDA7493 Electrical characterization curves Figure 29. FFT (0 dB) FFT (dB) +10 +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 1k 2k 5k 10k 20k frequency (Hz) Figure 30.
Package mechanical data 7 TDA7493 Package mechanical data The TDA7493 comes in a 24-pin HTSSOP exposed-pad-down package. The outline is shown in Figure 31 and the dimensions are given in Table 10. The package code is YO and the JEDEC/EIAJ reference number is JEDEC MO-153-ADT. Figure 31.
TDA7493 Package mechanical data Table 10. HTSSOP24 EPD dimensions mm inch Reference Notes Min Typ Max Min Typ Max A - - 1.20 - - 0.047 - A1 - - 0.15 - - 0.006 - A2 0.80 1.00 1.05 0.031 0.039 0.041 - b 0.19 - 0.30 0.007 - 0.012 - c 0.09 - 0.20 0.004 - 0.008 - D 7.70 7.80 7.90 0.303 0.307 0.311 (1) D1 4.80 5.00 5.2 0.189 0.197 0.205 - E 6.20 6.40 6.60 0.244 0.252 0.260 - E1 4.30 4.40 4.50 0.169 0.173 0.177 (2) E2 3.00 3.
Heatsink provision 8 TDA7493 Heatsink provision With the exposed-pad packages, it is possible to use the printed circuit board as a heatsink. Using a PCB copper ground area of 3 x 3 cm2 with 16 via holes to make contact with the exposed pad, a thermal resistance of 37 °C/W can be achieved. The amount of power dissipated within the device depends primarily on the supply voltage, load impedance and output modulation level. The maximum estimated power dissipation for the TDA7493 is around 1.1 W.
TDA7493 9 Revision history Revision history Table 11. Document revision history Date Revision Changes 02-Apr-2008 1 Initial release. 16-Sep-2008 2 Updated application schematic on page 8 Updated Table 5: Electrical characteristics on page 9 Updated schematic of input structure on page 12 Updated Schematic for the filterless configuration on page 14 Updated section 5.8: Differential input on page 17. 01-Dec-2008 3 Added test voltage note to SC protection in section 5.
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