TDA7491HV 20 W + 20 W dual BTL class-D audio amplifier Features ■ 20 W + 20 W continuous output power: RL = 8 Ω, THD = 10% at VCC = 18 V ■ Wide-range single-supply operation (5 V - 18 V) ■ High efficiency (η = 90%) ■ Four selectable, fixed gain settings of nominally 20 dB, 26 dB, 30 dB and 32 dB ■ Differential inputs minimize common-mode noise ■ No ‘pop’ at turn-on/off ■ Standby and mute features ■ Short-circuit protection ■ Thermal overload protection ■ Externally synchronizable PowerSS
Contents TDA7491HV Contents 1 Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 4 2.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TDA7491HV 8 Contents Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of tables TDA7491HV List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. 4/41 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TDA7491HV List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43.
List of figures Figure 49. Figure 50. Figure 51. Figure 52. Figure 53. Figure 54. Figure 55. Figure 56. Figure 57. Figure 58. Figure 59. 6/41 TDA7491HV PowerSSO-36 EPD outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Applications circuit for class-D amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TDA7491HV 1 Device block diagram Device block diagram Figure 1 shows the block diagram of one of the two identical channels of the TDA7491HV. Figure 1.
Pin description TDA7491HV 2 Pin description 2.1 Pinout Figure 2.
TDA7491HV 2.2 Pin description Pin list Table 2.
Electrical specifications TDA7491HV 3 Electrical specifications 3.1 Absolute maximum ratings Table 3. Absolute maximum ratings Symbol 3.2 Parameter Value Unit VCC DC supply voltage for pins PVCCA, PVCCB 23 V Vi Voltage limits for input pins STBY,MUTE,INNA,INPA,INNB INPB,GAIN0,GAIN1 -0.3 TO 3.6 V Top Operating temperature -40 to 85 °C Tj Junction temperature -40 to 150 °C Tstg Storage temperature -40 to 150 °C Thermal data Refer also to Section 7.
TDA7491HV Electrical specifications Table 5. Electrical specifications (continued) Symbol Parameter VUVP Undervoltage protection threshold RdsON Power transistor on resistance Po Output power Po Output power Condition Min Typ Max - - - 4.5 High side - 0.2 - Low side - 0.2 - THD = 10% - 20 - THD = 1% - 16 - RL = 8 Ω, THD = 10% VCC = 12 V - 9.5 - RL = 8 Ω, THD = 1% VCC = 12 V - 7.2 - Unit V Ω W W PD Dissipated power Po = 20 W + 20 W, THD = 10% - 4.
Characterization curves 4 TDA7491HV Characterization curves The following characterization curves were made using the TDA7491HV demo board. The LC filter for the 4-Ω load uses components of 15 µH and 470 nF, whilst that for the 6-Ω load uses 22 µH and 220 nF and that for the 8-Ω load uses 33 µH and 220 nF. 4.1 With 4-Ω load at VCC = 14 V Figure 3. Output power vs.
TDA7491HV Characterization curves Figure 5. THD vs. output power (100 Hz) p THD (%) 10 Test Condition: 5 Vcc=14V, 2 RL=4 ohm, Rosc=39k˖, Cosc=100nF, f =100Hz, 1 0.5 Gv=30dB, Tamb=25ഒ 0.2 0.1 Specification Limit: 0.05 Typical: 0.02 20W @ THD=10% 0.01 100m 200m 500m 1 2 5 10 20 Output Power (W) Figure 6. THD vs. frequency q y THD (%) 0.5 Test Condition: 0.4 Vcc=14V, 0.3 RL=4 ohm, 0.2 Rosc=39k˖, Cosc=100nF, f = 1kHz, 0.1 Gv=30dB, 0.07 0.06 Po=1W 0.05 Tamb=25ഒ 0.04 0.
Characterization curves Figure 8. TDA7491HV Crosstalk vs. frequency Crosstalk Crosstalk (dB) -40 -45 Test Condition: -50 Vcc =14V, -55 RL= 4 ohm, -60 Rosc= 39k˖, Cosc = 100nF, -65 -70 f = 1kHz, -75 Gv = 30dB, -80 Po = 1W -85 -90 Tamb = 25ഒ -95 -100 Specification Limit: -105 Typical: >50dB (@ f = 1kHz) -110 -115 -120 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) Figure 9.
TDA7491HV Characterization curves Figure 11. Power supply rejection ratio vs. frequency +0 -10 Test Condition: Vcc =14V, -20 RL= 4 ohm, -30 Ripple frequency=100Hz -40 Ripple voltage=500mV Rosc = 39k˖, Cosc = 100nF, Vin=0, Gv=30dB, d B r 0dB refers to 500mV,100Hz A -50 -60 Tamb=25ഒ -70 -80 -90 -100 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 12. Power dissipation and efficiency vs.
Characterization curves TDA7491HV Figure 14. Current consumption vs. voltage on pin MUTE , TXL HVFHQW YV 0XW H YRO W DJH Test Condition: Vcc =14V, Rosc = 39k˖, Cosc = 100nF, Vin=0, Tamb=25ഒ , TXL HVFHQW P$ RL= 4 ohm, Vcc=14V Rload=4ohm Gain=30dB Vin=0 0XW H YRO W DJH 9 Figure 15. Attenuation vs.
TDA7491HV Characterization curves Figure 17. Attenuation vs. voltage on pin STBY $W W HQXDW L RQ YV 6W DQGE\ YRO W DJH Test Condition: Vcc =14V, $W W HQXDW L RQ G% RL= 4 ohm, Rosc = 39k˖, Cosc = 100nF, 0dB@f=1kHz,Po=1w, Gain=30dB. Tamb=25ഒ Vcc=14V Rload=4ohm 0dB@f=1kHz, Po=1w Gain=30dB 6W DQGE\ YRO W DJH 9 With 6-Ω load at VCC = 16 V Figure 18. Output power vs.
Characterization curves TDA7491HV Figure 19. THD vs. output power (1 kHz) THD vs. Output Power THD (%) 10 Test Condition: 5 Vcc =16V, 2 RL= 6 ohm, 1 Rosc =39k˖, Cosc =100nF, f =1kHz, 0.5 Gv =30dB, 0.2 Tamb =25ഒ 0.1 Specification Limit: 0.05 Typical: Po=20W @ THD=10% 0.02 0.01 200m 500m 1 2 5 10 20 Output Power (W) Figure 20. THD vs. output power (100 Hz) p THD (%) 10 Test Condition: 5 Vcc =16V, 2 RL = 6 ohm, Rosc =39k˖, Cosc =100nF, 1 0.5 f =100Hz, Gv =30dB, 0.
TDA7491HV Characterization curves Figure 22. Frequency response Ampl (dB) +2 Test Condition: Vcc=16V, +1 RL= 6 ohm, Rosc =39k˖, Cosc =100nF, -0 f = 1kHz, -1 Gv =30dB, Po =1W -2 Tamb =25ഒ -3 Specification Limit: -4 Max: +/-3dB @20Hz to 20kHz -5 10 20 50 100 200 500 1k 2k 5k 10k 30k Frequency (Hz) Figure 23. Crosstalk vs.
Characterization curves TDA7491HV Figure 25. FFT (-60 dB) FFT (dB) +0 Test Condition: Vcc =16V, -10 -20 -30 RL= 6 ohm, -40 Rosc =39k˖, Cosc =100nF, -50 f =1kHz, -60 Gv =30dB, -70 Po = -60dB (@ 1W =0dB) -80 -90 Tamb =25ഒ -100 -110 Specification Limit: -120 Typical: > 90dB -130 for the harmonic frequency -140 -150 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) Figure 26. Power supply rejection ratio vs.
TDA7491HV Characterization curves Figure 28. Closed-loop gain vs. frequency +2 +1.5 Gain=26dB +1 Test Condition: Vcc =16V, -0 RL= 6 ohm, Rosc =39k˖, Cosc =100nF, 0dB@f=1kHz,Po=1w, Gv=32dB, Tamb =25ഒ Gain=32dB +0.5 -0.5 -1 d B r -1.5 A -2 Gain=30dB Gain=22dB -2.5 -3 -3.5 -4 -4.5 -5 20 50 100 200 500 1k 2k 5k 10k 20k 30k Hz Figure 29. Current consumption vs.
Characterization curves TDA7491HV Figure 31. Current consumption vs. voltage on pin STBY , TXL HVFHQW YV 6W DQGE\ YRO W DJH Test Condition: Vcc =16V, Rosc =39k˖, Cosc =100nF, Vin=0, Gain=30dB, Tamb =25ഒ , TXL HVFHQW P$ RL= 6 ohm, Vcc=16V Rload=6ohm Gain=30dB Vin=0 6W DQGE\ YRO W DJH 9 Figure 32. Attenuation vs.
TDA7491HV With 8-Ω load at VCC = 18 V Figure 33. Output power vs. supply voltage 7'$ +9 2XW SXW 3RZHU YV 6XSSO \ 9RO W DJH RKP Test Condition : Vcc = 5~18V, RL = 8 ohm, Rosc =39kȍ, Cosc =100nF, f =1kHz, Gv =30dB, Tamb =25ഒ 2XW SXW 3RZHU : 4.
Characterization curves TDA7491HV Figure 35. THD vs. output power (100 Hz) THD vs. Output Power THD (%) 10 Test Condition: 5 Vcc =18V, 2 RL= 8 ohm, 1 Rosc =39k˖, Cosc =100nF, 0.5 f =100Hz, Gv =30dB, 0.2 Tamb =25ഒ 0.1 0.05 Specification Limit: 0.02 Typical: 0.01 20W @ THD =10% 0.005 100m 200m 500m 1 2 5 10 20 Output Power (W) Figure 36. THD vs. frequency q y THD (%) 2 Test Condition: 1 Vcc =18V, RL= 8 ohm, 0.5 Rosc =39k˖, Cosc =100nF, f =1kHz, 0.2 Gv =30dB, 0.
TDA7491HV Characterization curves Figure 38. Crosstalk vs. frequency Crosstalk (dB) -40 -45 Test Condition: -50 Vcc =18V, -55 RL= 8 ohm, -60 Rosc =39k˖, Cosc =100nF, -65 -70 f = 1kHz, -75 Gv=30dB, -80 Po=1W -85 -90 Tamb=25ഒ -95 -100 -105 Specification Limit: Typical: >50dB (@ f =1kHz) -110 -115 -120 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) Figure 39.
Characterization curves TDA7491HV Figure 41. Power supply rejection ratio vs. frequency +0 -10 Test Condition: -20 Vcc =18V, RL= 8 ohm, -30 Ripple frequency=100Hz Rosc =39k˖, Cosc =100nF, Ripple voltage=500mV -40 Vin=0, Gv =30dB, d B r Tamb =25ഒ A -50 -60 0dB refers to 500mV, 100Hz -70 -80 -90 -100 20 50 100 200 500 1k 2k 5k 10k 20k Hz 8ohm 18v PSRR.at27 Figure 42. Power dissipation and efficiency vs.
TDA7491HV Characterization curves Figure 44. Current consumption vs. voltage on pin MUTE , TXL HVFHQW YV 0XW H YRO W DJH Test Condition: Vcc =18V, RL= 8 ohm, Vin=0, Gain=30dB, Tamb =25ഒ , TXL HVFHQW P$ Rosc =39k˖, Cosc =100nF, Vcc=18V Rload=8ohm Gain=30dB Vin=0 0XW H YRO W DJH 9 Figure 45. Attenuation vs.
Characterization curves TDA7491HV Figure 47. Attenuation vs.
TDA7491HV Test board Figure 48. Test board (TDA7491HV) layout 2. Test Board 4.
Package mechanical data 5 TDA7491HV Package mechanical data The TDA7491HV comes in a 36-pin PowerSSO package with exposed pad down (EPD). Figure 49 below shows the package outline and Table 6 gives the dimensions. h x 45° Figure 49.
TDA7491HV Package mechanical data Table 6. PowerSSO-36 EPD dimensions Dimensions in mm Dimensions in inches Symbol Min Typ Max Min Typ Max A 2.15 - 2.47 0.085 - 0.097 A2 2.15 - 2.40 0.085 - 0.094 a1 0.00 - 0.10 0.000 - 0.004 b 0.18 - 0.36 0.007 - 0.014 c 0.23 - 0.32 0.009 - 0.013 D 10.10 - 10.50 0.398 - 0.413 E 7.40 - 7.60 0.291 - 0.299 e - 0.5 - - 0.020 - e3 - 8.5 - - 0.335 - F - 2.3 - - 0.091 - G - - 0.10 - - 0.
Applications circuit 6 TDA7491HV Applications circuit Figure 50. Applications circuit for class-D amplifier & Q) & Q) 6*1' & Q) & Q) 6*1' & Q) 68%B*1' 2873$ / ,13$ 2873$ X+ ,11$ - & & Q) Q) ',$* 39&&$ ',$* 6<1&/. 526& *$,1 6<1&/. - ,1 / ,1 / & ,1 5 Q) 5 - .
TDA7491HV Application information 7 Application information 7.1 Mode selection The three operating modes , defined below, of the TDA7491HV are set by the two inputs STBY (pin 20) and MUTE (pin 21) as shown inTable 7: Mode settings on page 33. ● Standby mode: all circuits are turned off, very low current consumption. ● Mute mode: inputs are connected to ground and the positive and negative PWM outputs are at 50% duty cycle. ● Play mode: the amplifiers are active.
Application information 7.2 TDA7491HV Gain setting The gain of the TDA7491HV is set by the two inputs, GAIN0 (pin 30) and GAIN1 (pin 31). Internally, the gain is set by changing the feedback resistors of the amplifier. Table 8. Gain settings GAIN0 GAIN1 Nominal gain, Gv (dB) L(1) H(1) 20 L H 26 H L 30 H H 32 1. Refer to VinL and VinH in Table 5: Electrical specifications on page 10 for drive levels for L and H 7.
TDA7491HV 7.4 Application information Internal and external clocks The clock of the class-D amplifier can be generated internally or can be driven by an external source. If two or more class-D amplifiers are used in the same system, it is recommended that all devices operate at the same clock frequency. This can be implemented by using one TDA7491HV as master clock, while the other devices are in slave mode (that is, externally clocked. The clock interconnect is via pin SYNCLK of each device.
Application information 7.5 TDA7491HV Modulation The output modulation scheme of the BTL is called unipolar pulse width modulation (PWM). The differential output voltages change between 0 V and +VCC and between 0 V and -VCC. This is in contrast to the traditional bipolar PWM outputs which change between +VCC and -VCC. An advantage of this scheme is that it effectively doubles the switching frequency of the differential output waveform on the load then reducing the current ripple accordingly.
TDA7491HV 7.6 Application information Reconstruction low-pass filter Standard applications use a low-pass filter before the speaker. The cutoff frequency should be higher than 22 kHz and much lower than the output switching frequency. It is necessary to choose the L-C component values depending on the loud speaker impedance. Some typical values, which give a cutoff frequency of 27 kHz, are shown in Figure 56 and Figure 57 below. Figure 56. Typical LC filter for an 8-Ω speaker Figure 57.
Application information 7.7 TDA7491HV Protection functions The TDA7491HV is fully protected against undervoltages, overcurrents and thermal overloads as explained here. Undervoltage protection (UVP) If the supply voltage drops below the value of VUVP given in Table 5: Electrical specifications on page 10 the undervoltage protection is activated which forces the outputs to the high-impedance state. When the supply voltage recovers the device restarts.
TDA7491HV Application information Using such a PCB with a copper ground layer of 3x3 cm2 and 16 vias connecting it to the contact area for the exposed pad, a thermal resistance , junction to ambient (in natural air convection), of 24 °C/W can be achieved. The dissipated power within the device depends primarly on the supply voltage, load impedance and output modulation level.
Revision history 8 TDA7491HV Revision history Table 10. Document revision history Date Revision 02-Jul-2007 1 Initial release.
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