Datasheet

5/9
TDA7269A
Figure 4. Test and Application Circuit (Stereo Configuration)
APPLICATION SUGGESTIONS (Demo Board Schematic)
The recommended values of the external components are those shown the demoboard schematic different val-
ues can be used, the following table can help the designer.
(*) Closed loop gain has to be ≥25dB
COMPONENT
SUGGESTION
VALUE
PURPOSE
LARGER THAN
RECOMMENDED VALUE
SMALLER THAN
RECOMMENDED VALUE
R1 10KΩ Mute Circuit Increase of Dz Biasing
Current
R2 15KΩ Mute Circuit V
pin
#5 Shifted Downward V
pin
#5 Shifted Upward
R3 18KΩ Mute Circuit V
pin
#5 Shifted Upward V
pin
#5 Shifted Downward
R4 15KΩ Mute Circuit V
pin
#5 Shifted Upward V
pin
#5 Shifted Downward
R5, R8 18KΩ Closed Loop Gain
Setting (*)
Increase of Gain
R6, R9 560Ω Decrease of Gain
R7, R10 4.7Ω Frequency Stability Danger of Oscillations Danger of Oscillations
C1, C2 1µF Input DC Decoupling Higher Low Frequency Cutoff
C3 1µF St-By/Mute Time
Constant
Larger On/Off Time Smaller On/Off Time
C4, C6 1000µF Supply Voltage Bypass Danger of Oscillations
C5, C7 0.1µF Supply Voltage Bypass Danger of Oscillations
C8, C9 0.1µF Frequency Stability
Dz 5.1V Mute Circuit
R3
IN (L)
C1
R2 C3
MUTE/
ST-BY
GND
IN (R)
C2
R7
R10
C8
C9
OUT (L)
OUT (R)
C6
C4
+V
S
3
5
7
9
6
11
2
4+
+
-
-
D94AU087B
RL (L)
RL (R)
+V
S
-V
S
R9
R5
IN- (L)
8
10 IN- (R)
1
SW1
R1
DZ
R4
SW2
C7
R8
R6
C5
Q1
ST-BY
MUTE