Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Schematic and pins connection diagrams
- 2 Electrical specifications
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Bridge amplifier section
- 2.4 Stereo amplifier application
- Figure 9. Typical stereo application circuit
- 2.4.1 Electrical characteristics (stereo application)
- Table 7. Electrical characteristics (stereo application)
- Figure 10. Quiescent output voltage vs. supply voltage (stereo amplifier)
- Figure 11. Quiescent drain current vs. supply voltage (stereo amplifier)
- Figure 12. Distortion vs. output power (stereo amplifier)
- Figure 13. Output power vs. supply voltage, RL = 2 and 4 W (stereo amplifier)
- Figure 14. Output power vs. supply voltage, RL = 1.6 and 3.2 W (stereo amplifier)
- Figure 15. Distortion vs. frequency, RL = 2 and 4 W (stereo amplifier)
- Figure 16. Distortion vs. frequency, RL = 1.6 and 3.2 W (stereo amplifier)
- Figure 17. Supply voltage rejection vs. C3 (stereo amplifier)
- Figure 18. Supply voltage rejection vs. frequency (stereo amplifier)
- Figure 19. Supply voltage rejection vs. C2 and C3, GV = 390/1 W (stereo amplifier)
- Figure 20. Supply voltage rejection vs. C2 and C3, GV = 1000/10 W (stereo amplifier)
- Figure 21. Gain vs. input sensitivity RL = 4 W (stereo amplifier)
- Figure 22. Gain vs. input sensitivity RL = 2 W (stereo amplifier)
- Figure 23. Total power dissipation and efficiency vs. output power (bridge)
- Figure 24. Total power dissipation and efficiency vs. output power (stereo)
- 3 Application suggestion
- 4 Application information
- Figure 25. Bridge amplifier without boostrap
- Figure 26. PC board and components layout of Figure 25
- Figure 27. Low cost bridge amplifier (GV = 42 dB)
- Figure 28. PC board and components layout of Figure 27
- Figure 29. 10 + 10 W stereo amplifier with tone balance and loudness control
- Figure 30. Tone control response (circuit of Figure 29)
- Figure 31. 20 W bus amplifier
- Figure 32. Simple 20 W two way amplifier (FC = 2 kHz)
- Figure 33. Bridge amplifier circuit suited for low-gain applications (GV = 34 dB)
- Figure 34. Example of muting circuit
- 4.1 Built-in protection systems
- 5 Package information
- 6 Revision history

TDA2005 Schematic and pins connection diagrams
Doc ID 1451 Rev 6 5/25
1 Schematic and pins connection diagrams
Figure 1. Schematic diagram
Figure 2. Pins connection diagram (top view)
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