Datasheet

STULPI01A, STULPI01B ULPI registers
Doc ID 14817 Rev 4 33/44
Note: 07h-09h(Read), 07h(Write), 08h(Set), 09h(Clear). These addresses enable alternative
interfaces and STULPI01 features.
Table 18. Interface control register
Field name Bits Access Reset Description
6-pin
FsLsSerialMode
0 rd/wr/s/c 0b
Changes the ULPI interface to 6-pin Serial mode. The
STULPI01 automatically clears this bit when Serial mode is
exited.
0b: FS/LS packets are sent using parallel interface.
1b: FS/LS packets are sent using 6-pin serial interface.
3-pin
FsLsSerialMode
1 rd/wr/s/c 0b
Changes the ULPI interface to 3-pin Serial mode. The
STULPI01 automatically clears this bit when Serial mode is
exited.
0b: FS/LS packets are sent using parallel interface.
1b: FS/LS packets are sent using 4-pin serial interface.
Carkit mode 2 rd/wr/s/c 0b
The STULPI01 does not support all the features of Car Kit
mode. Only the UART functionality is implemented.
0b: disables serial Car Kit mode.
1b: enables serial Car Kit mode.
ClockSuspendM 3 rd/wr/s/c 0b
Active low clock suspend. Valid only in Serial mode and Car
Kit mode. Powers down the internal clock circuitry. Valid only
when SuspendM = 1b. The STULPI01 ignores
ClockSuspend when SuspendM = 0b. By default, the clock
is not powered in Serial and Car Kit modes.
0b: clock is not powered in Serial and Car Kit modes.
1b: clock is powered in Serial and Car Kit modes.
Reserved 4 rd/wr/s/c 0b
The STULPI01 does not implement auto-resume feature,
because the clock can be restarted in less than 1ms.
Indicator
complement
5 rd/wr/s/c 0b
Gives the command to invert the ExternalVbusIndicator
signal, generating the complement output.
0b: The STULPI01 does not invert ExternalVbusIndicator
signal
1b: STULPI01 inverts ExternalVbusIndicator signal.
Indicator
PassThru
6 rd/wr/s/c 0b
Controls whether the complement output is qualified with the
Internal VbusValid comparator before being used in the
Vbus State in the RX CMD.
0b: complements output signal is qualified with the Internal
VbusValid comparator.
1b: complements output signal is not qualified with the
Internal VbusValid comparator.
Interface protect
disable
7 rd/wr/s/c 0b
Controls circuitry for protecting the ULPI interface when the
link 3-states STP and DATA. This bit is not intended to affect
the operation of the holding state. Refer to Section 3.12 of
ULPI specification 1.1 for more details.
0b: enables the interface protection circuit (default).
1b: disables the interface protection circuit.
Interface protection circuit consists of pull-down resistors on
DATA and pull-up resistors on STP.