Datasheet

STULPI01A, STULPI01B Block description
Doc ID 14817 Rev 4 21/44
and sensing. The digital part consists of a serializer and deserializer, transforming serial bit
stream to 8-bit parallel port, and finite state machine implementing the PHY protocol layer,
bit stuffing, unstuffing, etc.
Figure 7. USB 2.0 PHY block diagram
6.12 Power saving features
To reduce power consumption, the STULPI01 implements 2 Low-power modes of operation.
1. Low-power mode, which is defined in the ULPI specification.
2. Power-down mode to save more power in case USB function is not needed.
More information on these modes can be found in the following paragraphs.
6.13 Modes of operation
6.13.1 ULPI synchronous mode
The STULPI01 transceiver supports SDR mode operation (12-pin interface). The selection
of SDR mode is performed during the startup reset procedure.
6.13.2 6-pin FS/LS serial mode
This mode is entered by writing to the corresponding bit in the Interface Control register.
6.13.3 3-pin FS/LS serial mode
This mode is entered by writing to the corresponding bit in the Interface Control register.
HS
Ser-Des
LS/FS
Ser-Des
HS Disconnect Det.
Squelch Detector
LS/FS SE Receivers
3.3 V
3.3 V
19.25 kΩ
DP
DN
AM04949v2