Datasheet

DC and AC parameters STTS75
32/41 Doc ID 13298 Rev 11
Figure 16. Bus timing requirements sequence
Table 15. AC characteristics
Sym Parameter
(1)(2)
1. Valid for ambient operating temperature: T
A
= –55 to 125 °C; V
DD
= 2.7 V to 5.5 V (except where noted).
2. Devices are tested at maximum clock frequency of 400 kHz.
Min Max Unit
f
SCL
SCL clock frequency 0 400 kHz
t
BUF
Time the bus must be free before a new transmission can start 1.3 µs
t
F
SDA and SCL fall time 300 ns
t
HD:DAT
(3)
3. Transmitter must internally provide a hold time to bridge the undefined region (300 ns max) of the falling
edge of SCL.
Data hold time 0.9 µs
t
HD:STA
START condition hold time
(after this period the first clock pulse is generated)
600 ns
t
HIGH
Clock high period 600 ns
t
LOW
Clock low period 1.3 µs
t
R
SDA and SCL rise time 300 ns
t
SU:DAT
Data setup time 100 ns
t
SU:STA
START condition setup time
(only relevant for a repeated start condition)
600 ns
t
SU:STO
STOP condition setup time 600 ns
t
TIMEOUT
SDA low time for reset of serial interface
(4)
4. For SMBus compatibility STTS75 supports bus timeout. Holding the SDA line low for a period greater than
timeout duration will cause STTS75 to reset the SDA line to the state of serial bus communication (SDA
high).
75 325 ns
AI00589
SDA
P
t
SU:STO
t
SU:STA
t
HD:STA
SR
SCL
t
SU:DAT
t
F
t
HD:DAT
t
R
t
HIGH
t
LOW
t
HD:STA
t
BUF
SP