Datasheet

STTS75 Functional description
Doc ID 13298 Rev 11 25/41
Figure 9. Typical 2-byte READ from preset pointer location (e.g. temp - T
OS
, T
HYS
)
Figure 10. Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp)
Figure 11. Typical 1-byte READ from the configuration register with preset pointer
AI12281b
119199
1
Start
by
Master
Address Byte
Most Significant Data Byte Least Significant Data Byte
ACK
by
STTS75
ACK
by
Master
No ACK
by
Master
Stop
Cond.
by
Master
0 0 1 A2 A1 A0 R D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
AI12282b
119199
1
Repeat
Start
by
Master
Address Byte
Most Significant Data Byte Least Significant Data Byte
ACK
by
STTS75
ACK
by
Master
No ACK
by
Master
Stop
Cond.
by
Master
0 0 1 A2 A1 A0 R D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
1199
1
Start
by
Master
Address Byte
Pointer Byte
ACK
by
STTS75
ACK
by
STTS75
0 0 1 A2 A1 A0 W 0 0 0 0 0 0 D1 D0
AI122
83b
1199
1
Start
by
Master
Address Byte
Data Byte
ACK
by
STTS75
No ACK
by
Master
Stop
Cond.
by
Master
0 0 1 A2 A1 A0 R D7 D6 D5 D4 D3 D2 D1 D0