Datasheet

Functional description STTS75
20/41 Doc ID 13298 Rev 11
3.1.5 Hysteresis temperature register (T
HYS
)
T
HYS
register is a two-byte (16-bit) READ/WRITE register that stores the user-
programmable lower trip-point temperature for the thermal alarm in two’s complement
format (see Ta bl e 10). This register defaults to 75 °C at power-up (i.e., 0100 1011 0000
0000).
The format of this register is the same as that of the temperature register. The 4 LSBs of the
T
HYS
register are hardwired to zero, so data written to these bits is ignored. The MSB
position contains the sign bit for the digital temperature and bit 14 contains the temperature
MSB.
The resolution setting for the A/D conversion determines how many bits of the T
HYS
register
are used by the thermal alarm. For example, for 9-bit conversions, the hysteresis
temperature is defined by the 9 MSBs of the T
HYS
register, and all remaining bits are “Don’t
cares.”
3.2 Power-up default conditions
The STTS75 always powers up in the following default states:
● Thermostat mode = comparator mode
● Polarity = active-low
● Fault tolerance = 1 fault (i.e., relevant bits set to '0' in the configuration register)
● T
OS
= 80 °C
● T
HYS
= 75 °C
● OSM = 0 (disabled)
● Register pointer = 00 (temperature register)
● Conversion resolution = 9-bit (i.e., RC0 = 0 and RC1 = 0 in the configuration register;
see Table 7 on page 18)
Note: After power-up these conditions can be reprogrammed via the serial interface.
Table 10. T
OS
and T
HYS
register format
Bytes MS byte LS byte
Bits
MSB THSB TLSB LSB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
STTS75 SB TMSB TD TD TD TD TD TD
9-bit
LSB
10-bit
LSB
11-bit
LSB
12-bit
LSB
000 0
Keys: SB = two’s complement sign bit
TMSB = temperature MSB
TLSB = temperature LSB
TD = temperature data