STTS75 Digital temperature sensor and thermal watchdog Features ■ Measures temperatures from –55 °C to +125 °C (–67 °F to +257 °F) – ±0.5 °C (typ) accuracy – ±2 °C (max) accuracy from –25 °C to +100 °C ■ Low operating current: 75 µA (typ) ■ No external components required ■ 2-wire I2C/SMBus-compatible serial interface – Selectable serial bus address allows connection of up to eight devices on the same bus ■ Thermometer resolution is user-configurable from 9 (default) to 12 bits (0.5 °C to 0.
Contents STTS75 Contents 1 2 3 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 Serial communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 Temperature sensor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.3 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.3.1 SDA (open drain) . . . . .
STTS75 Contents 3.4.2 Start data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4.3 Stop data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4.4 Data valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4.5 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.5 READ mode . . . . . . . . . . . .
List of tables STTS75 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. 4/41 Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Fault tolerance setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
STTS75 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Connections (SO8, TSSOP8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Description 1 STTS75 Description The STTS75 is a high-precision CMOS (digital) temperature sensor IC with a delta-sigma analog-to-digital (ADC) converter and an I2C-compatible serial digital interface. It is targeted for general applications such as personal computers, system thermal management, electronics equipment, and industrial controllers, and is packaged in the industry standard 8-lead MSOP(TSSOP) and SO8 packages.
STTS75 Description The measured temperature value is compared with a temperature limit (which is stored in the 16-bit (TOS) READ/WRITE register), and the hysteresis temperature (which is stored in the 16-bit (THYS) READ/WRITE register). If the measured value exceeds these limits, the OS/INT pin is activated (see Figure 3 on page 8). Figure 1. Logic diagram VDD SDA(1) SCL A0 STTS75 O.S./INT(1) A1 A2 GND AI11840 1. SDA and OS/INT are open drain. Note: See Pin descriptions on page 9 for details.
Description STTS75 Figure 2. Connections (SO8, TSSOP8) SDA(1) SCL O.S./INT(1) GND 1 2 3 4 8 7 6 5 VDD A0 A1 A2 AI11841 1. SDA and OS/INT are open drain. Note: See Pin descriptions on page 9 for details. Figure 3.
STTS75 1.3 Description Pin descriptions See Figure 1 on page 7 and Table 1 on page 7 for a brief overview of the signals connected to this device. 1.3.1 SDA (open drain) This is the serial data input/output pin for the 2-wire serial communication port. 1.3.2 SCL This is the serial clock input pin for the 2-wire serial communication port. 1.3.3 OS/INT (open drain) This is the overlimit signal/interrupt alert output pin. It is open drain, so it needs a pull-up resistor.
Operation 2 STTS75 Operation After each temperature measurement and analog-to-digital conversion, the STTS75 stores the temperature as a 16-bit two’s complement number in the 2-byte temperature register. The most significant bit (S, bit 15) indicates if the temperature is positive or negative: ● for positive numbers S = 0, and ● for negative numbers S = 1. The most recently converted digital measurement can be read from the temperature register at any time.
STTS75 2.1 Operation Applications information STTS75 digital temperature sensors are optimal for thermal management and thermal protection applications. They require no external components for operations except for pullup resistors on SCL, SDA, and OS/INT outputs. A 0.1 µF bypass capacitor is recommended. The sensing device of STTS75 is the chip itself. The typical interface connection for this type of digital sensor is shown in Figure 4 on page 11.
Operation 2.2 STTS75 Thermal alarm function The STTS75 thermal alarm function provides user-programmable thermostat capability and allows the STTS75 to function as a standalone thermostat without using the serial interface. The OS/INT output is the alarm output. This signal is an open drain output, and at power-up, this pin is configured with active-low polarity by default. 2.
STTS75 2.4 Operation Interrupt mode In Interrupt mode, the OS/INT output first becomes active when the measured temperature exceeds the TOS value a consecutive number of times equal to the FT value in the configuration register. Once activated, the OS/INT can only be cleared by either putting the STTS75 into shutdown mode or by reading from any register (temperature, configuration, TOS, or THYS) on the device.
Operation 2.5 STTS75 Fault tolerance For both comparator and interrupt modes, the alarm “fault tolerance” setting plays a role in determining when the OS/INT output will be activated. Fault tolerance refers to the number of consecutive times an error condition must be detected before the user is notified. Higher fault tolerance settings can help eliminate false alarms caused by noise in the system. The alarm fault tolerance is controlled by the bits (bits 4 and 3) in the configuration register.
STTS75 2.7 Operation Temperature data format Table 4 shows the relationship between the output digital data and the external temperature for 12-bit resolution. Temperature data for temperature, TOS and THYS registers is represented by 9-bit, 10-bit, 11-bit, and 12-bit depending upon the resolution bits RC1, RC0 (bits 6 and 5) in the configuration register (see Table 7 on page 18). The default resolution is 9-bit.
Operation 2.9 STTS75 One-shot mode STTS75 supports a one-shot temperature measurement mode. This is invoked by putting the device in shutdown mode (SD bit 0 in the configuration register is set to ‘1’) and writing a ‘1’ to the OSM (bit 7) to start a single temperature conversion. STTS75 returns to the shutdown state after completion of the single conversion. This is useful to reduce power consumption when continuous monitoring is not needed.
STTS75 Functional description 3 Functional description The STTS75 registers have unique pointer designations which are defined in Table 6 on page 17. Whenever any READ/WRITE operation to the STTS75 register is desired, the user must “point” to the device register to be accessed.
Functional description 3.1.2 STTS75 Configuration register The configuration register is used to store the device settings such as device operation mode, OS/INT operation mode, OS/INT polarity, and OS/INT fault queue. The configuration register allows the user to program various options such as conversion resolution (see Table 8), thermostat fault tolerance, thermostat polarity, thermostat operating mode, and shutdown mode. The user has READ/WRITE access to all of the bits in the configuration register.
STTS75 3.1.3 Functional description Temperature register The temperature register is a two-byte (16-bit) “Read only” register (see Table 9 on page 19). Digital temperatures from the ADC are stored in the temperature register in two’s complement format, and the contents of this register are updated each time the A/D conversion is finished. The user can read data from the temperature register at any time.
Functional description 3.1.5 STTS75 Hysteresis temperature register (THYS) THYS register is a two-byte (16-bit) READ/WRITE register that stores the userprogrammable lower trip-point temperature for the thermal alarm in two’s complement format (see Table 10). This register defaults to 75 °C at power-up (i.e., 0100 1011 0000 0000). The format of this register is the same as that of the temperature register. The 4 LSBs of the THYS register are hardwired to zero, so data written to these bits is ignored.
STTS75 3.3 Functional description Serial interface Writing to and reading from the STTS75 registers is accomplished via the two-wire serial interface protocol which requires that one device on the bus initiates and controls all READ and WRITE operations. This device is called the “master” device. The master device also generates the SCL signal which provides the clock signal for all other devices on the bus. These other devices on the bus are called “slave” devices.
Functional description 3.4.4 STTS75 Data valid The state of the data line represents valid data when after a start condition, the data line is stable for the duration of the high period of the clock signal. The data on the line may be changed during the low period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a start condition and terminated with a stop condition.
STTS75 3.4.5 Functional description Acknowledge Each byte of eight bits is followed by one acknowledge bit. This acknowledge bit is a low level put on the bus by the receiver whereas the master generates an extra acknowledge related clock pulse (see Figure 7 on page 23). A slave receiver which is addressed is obliged to generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter.
Functional description 3.5 STTS75 READ mode In this mode the master reads the STTS75 slave after setting the slave address (see Figure 8). Following the WRITE mode control bit (R/W=0) and the acknowledge bit, the word address 'An' is written to the on-chip address pointer. There are two READ modes: Note: ● Preset pointer locations (e.g.
STTS75 Functional description Figure 9. Typical 2-byte READ from preset pointer location (e.g. temp - TOS, THYS) 1 9 1 0 0 Start by Master 1 A2 A1 A0 1 R 9 1 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 Most Significant Data Byte Address Byte 9 Least Significant Data Byte ACK by STTS75 ACK by Master Stop Cond. by No ACK Master by Master AI12281b Figure 10. Typical pointer set followed by an immediate READ for 2-byte register (e.g.
Functional description 3.6 STTS75 WRITE mode In this mode the master transmitter transmits to the STTS75 slave receiver. Bus protocol is shown in Figure 12. Following the START condition and slave address, a logic '0' (R/W = 0) is placed on the bus and indicates to the addressed device that word address will follow and is to be written to the on-chip address pointer. These modes are shown in the WRITE mode typical timing diagrams (see Figure 12, and Figure 13, and Figure 14 on page 27). Figure 12.
STTS75 Functional description Figure 14. TOS and THYS WRITE 1 9 1 0 Start by Master 0 1 A2 A1 A0 1 W 9 0 0 0 0 0 0 D1 D0 Pointer Byte Address Byte ACK by STTS75 ACK by STTS75 1 9 D7 D6 D5 D4 D3 D2 D1 D0 1 9 D7 D6 D5 D4 D3 D2 D1 D0 Most Significant Data Byte Least Significant Data Byte ACK by STTS75 Doc ID 13298 Rev 11 ACK by STTS75 Stop Cond.
Typical operating characteristics 4 STTS75 Typical operating characteristics Figure 15. Temperature variation vs. voltage 140 120 Temperature (°C) 100 80 –20 60 0.
STTS75 5 Maximum ratings Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 12.
DC and AC parameters 6 STTS75 DC and AC parameters This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics tables that follow, are derived from tests performed under the measurement conditions summarized in Table 13. Designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. Table 13.
STTS75 DC and AC parameters Table 14. Sym VDD IDD IDD1 DC and AC characteristics Description Supply voltage Test condition(1) Min TA = –55 to +125 °C 2.7 Typ(2) Max Unit 5.5 V 100 µA VDD supply current, active temperature conversions VDD = 3.3 V VDD supply current, communication only TA = 25 °C 100 µA Standby supply current, serial port inactive TA = 25 °C 1.0 µA Accuracy for corresponding range 2.7 V ≤ VDD ≤ 5.5 V –25 °C < TA < 100 ±0.5 ±2.0 °C –55 °C < TA < 125 ±0.5 ±3.
DC and AC parameters STTS75 Figure 16. Bus timing requirements sequence SDA tBUF tHD:STA tHD:STA tR tF SCL tHIGH P S tLOW tSU:DAT tHD:DAT SR tSU:STA P tSU:STO AI00589 Table 15. AC characteristics Parameter(1)(2) Sym fSCL SCL clock frequency tBUF Time the bus must be free before a new transmission can start tF tHD:DAT(3) Min Max Unit 0 400 kHz 1.3 µs SDA and SCL fall time 300 ns Data hold time 0.
STTS75 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
Package mechanical data STTS75 Figure 17. SO8 – 8-lead plastic small outline (4.90 mm x 3.90 mm) package mechanical drawing h x 45˚ A2 A c ccc b e 0.25 mm GAUGE PLANE D k 8 E1 E 1 A1 L L1 SO-A Note: Drawing is not to scale. Table 16. SO8 – 8-lead plastic small outline (4.90 mm x 3.90 mm) package mechanical data mm inches Sym Typ Min A Typ Min 1.75 Max 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.009 ccc 0.25 0.004 0.010 0.049 0.10 0.
STTS75 Package mechanical data Figure 18. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package mechanical drawing D 8 5 c E1 1 E 4 k A1 A L2 L1 ccc b Note: L A2 e E3_ME Drawing is not to scale. Table 17. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package mechanical data mm inches Sym Typ Min A Max Min 1.10 A1 0.00 0.15 0.75 0.95 b 0.22 c A2 Typ 0.85 Max 0.043 0.000 0.006 0.030 0.037 0.40 0.009 0.016 0.08 0.23 0.003 0.
Package mechanical data STTS75 Figure 19. Carrier tape for SO8 and MSOP8 (TSSOP8) packages P0 E P2 D T A0 F TOP COVER TAPE W B0 P1 CENTER LINES OF CAVITY K0 USER DIRECTION OF FEED AM03073v1 Table 18. Carrier tape dimensions for SO8 and MSOP8 (TSSOP8) packages Package W D SO8 12.00 ±0.30 1.50 +0.10/ –0.00 MSOP8 12.00 (TSSOP8) ±0.30 1.50 +0.10/ –0.00 36/41 E P0 P2 F B0 K0 P1 T 1.75 4.00 2.00 5.50 ±0.10 ±0.10 ±0.10 ±0.05 6.50 ±0.10 5.30 ±0.10 2.20 ±0.10 8.00 ±0.10 0.
STTS75 Package mechanical data Figure 20. Reel schematic T 40mm min. Access hole At slot location B D C N A G measured Tape slot In core for Full radius Tape start 2.5mm min.width At hub AM04928v1 Table 19. Reel dimensions for 12 mm carrier tape - SO8 and MSOP8 (TSSOP8) packages A B (max) (min) 330 mm (13-inch) 1.5 mm Note: C 13 mm ± 0.2 mm D N (min) (min) 20.2 mm 60 mm G 12.4 mm + 2/–0 mm T (max) 18.
Part numbering 8 STTS75 Part numbering Table 20. Ordering information scheme Example: STTS75 M 2 F Device type STTS75 Package M = SO8 DS = MSOP8 (TSSOP8) Temperature range 2 = –55 to 125 °C Shipping method F = ECOPACK® package, tape & reel E = ECOPACK® package, tube For other options, or for more information on any aspect of this device, please contact the ST sales office nearest you.
STTS75 9 Package marking information Package marking information Figure 21. Device topside marking information (SO8) STTS75M2 EPYWW(1) ai13912 1. Traceability codes E = Additional information P = Plant code Y = Year WW = Work Week Figure 22. Device topside marking information (MSOP8/TSSOP8) TS75 PYWW(1) ai13913 1.
Revision history 10 STTS75 Revision history Table 21. 40/41 Document revision history Date Revision Changes 14-Jun-2006 1 Initial release. 22-Jan-2007 2 Update features (cover page), DC and AC characteristics (Table 14), package mecanical information (Figure 17, Table 16, Figure 18, Table 17) and part numbering (Table 20). 01-Mar-2007 3 Update cover page (package information); Section 2: Operation; Section 2.3: Comparator mode; Section 2.
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