Datasheet

STPMC1 Theory of operation
Doc ID 15728 Rev 7 65/77
t
3
: data value is placed in SDA
t
4
: SDA value is stable and shifted into the device
t
3
−> t
5
(> 10 µs): writing clock period
t
3
−> t
5
: 1 bit data value
t
5
−> t
6
: 6 bits address of the destination latch
t
6
−> t
7
: 1 bit EXE command
t
8
: end of SPI writing
t
9
: SPI enters idle state
9.21.4 Interfacing the standard 3-wire SPI with STPMC1 SPI
Due to the fact that a 2-wire SPI is implemented in the STPMC1, it is clear that sending any
command from a standard 3-wire SPI would require 3-wire to 2-wire interface, which should
produce a proper signal on SDATD from host signals SDI, SDO and SYN. A single gate 3-
state buffer could be omitted by an emulation of SPI just to send some command. On a
microcontroller this would be done by the following steps:
1. disable the SPI module
2. set SDI pin which is connected to SDATD to be output
3. activate SYN first and then SCS
4. apply new bit value to SDI and activate SCL
5. deactivate SCL
6. repeat the last two steps seven times to complete one byte transfer
7. repeat the last three steps for any remaining byte transfer
8. set SDI pin to be input
9. deactivate SCS and the SYN
10. enable the SPI module
In case of precharge command (0xFF), emulation above is not necessary. Due to the pull up
device on the SDATD pin of the STPMC1 the processor needs to perform the following
steps:
1. activate SYN first in order to latch the result;
2. after at least 1 s activate SCS
3. write one byte to the transmitter of SPI (this produces 8 pulses on SCL with SDI = 1)
4. deactivate SYN
5. optionally read the data records (the sequence of reading is altered
6. deactivate SCS
9.21.5 Permanent writing of the CFG bits
In order to make a permanent set of some CFG bits, the following procedure should
be conducted: