Datasheet

Theory of operation STPMC1
64/77 Doc ID 15728 Rev 7
Example 18: Setting a configuration bit
To set the configuration bit 47 (part of the R-phase current channel calibrator) to 0, we
must convert the decimal 47 to its 7-bit binary value: 0101111. The byte command is
then composed like this:
1 bit DATA value+7-bits address = 10101111 (0xAF)
The same procedure should be applied for the mode signals, but in this case the 7-bits
address must be taken from the relative
Tabl e 3 4 .
The lsb of command is also called EXE bit because instead of a data bit value, the
corresponding serial clock pulse is used to generate the necessary latching signal. This way
the writing mechanism does not need the measurement clock in order to operate, which
makes the operation of SPI module of STPMC1 completely independent from the rest of
device logic except from the signal POR.
Commands for changing system signals should be sent during active signals SCS and SYN
as it is shown in
Figure 24 . The SYN must be put low in order to disable SDATD output
driver of STPMC1 and make the SDATD as an input pin. A string of commands can be send
within one period of active signals SCS and SYN or command can be followed by reading
the data record but, in this case, the SYN should be deactivated in order to enable SDATD
output driver and a SYN pulse should be applied before activation of SCS in order to latch
the data.
t
1
−> t
2
(> 30 ns): SPI out of idle state
t
2
−> t
3
(> 30 ns): SPI enabled for write operation
Table 35. Functional description of commands
Bit pos.
76543210
Command
(X, D, A = {0, 1})
D0000000 CFG000=D, (shadow of first configurator, TSTD)
DAAAAAAA CFGa=D, (shadow of any configurator, a = AAAAAA
2
< 1110000
2
)
D1101111 CFG111=D, (shadow of last configurator, CHK)
Figure 24. Timing for writing configuration and mode bits
t
1
t
2
t
3
t
4
t
5
t
6
t
8
t
9
t
7
SCLNLC
SYN
SCS
SDATD
t
1
t
2
t
3
t
4
t
5
t
6
t
8
t
9
t
7
SCLNLC
SYN
SCS
SDATD