Datasheet

Theory of operation STPMC1
28/77 Doc ID 15728 Rev 7
error occurs the correspondent phase bit BCF is set. When the ΔΣ signal becomes correct
again the
BCF flag is cleared immediately.
The 3-ph status bit
BCF is the OR of each phase bit BFC, but it takes into account also the
connection of the neutral wire (DAN-I stream).
The other error condition occurs if the MOP, MON and LED pin outputs signals are different
from the internal signals that drive them. This can occur if some of this pin is forced to GND
or to some other imposed voltage value. In this case the internal status bit
PIN is
immediately activated providing the information that some hardware problem has been
detected, for example the stepper motor has been mechanically blocked.
These two error condition don't influence energy accumulation.
9.10 Tamper detection module (status bits: BCS , BSF , BIF ,
configuration bit ENH
)
The tamper detection module is used to prevent theft of energy through improper connection
of the meter. The tamper indicator is activated when:
● sum of currents is above tamper threshold (status bit BCS = 1),
● phase sequence is wrong (status bit BSF = 1),
● phase active powers don't have the same sign (status bit BIF = 1),
● electromagnetic interference (EMI) is detected (only with ENH = 1).
In standalone application mode (APL
[1] = 1) the SDATD pin is used to notify the tamper
condition.
In 3-phase system (SYS
= 0, 1, 2) this output is set if at least one of the internal status bits:
BCS , BSF , BIF has been set or if EMI has been detected.
In other systems (SYS
≠ 0, 1, 2) it indicates only BCS or EMI.
Example 4: Tamper output on SDATD pin
SYS = 0, 1 or 2 and APL [1] = 1:
BCS = 0, BSF = 0, BIF = 0 → Tamper (SDATD pin) = 0
BCS = 0, BSF = 1, BIF = 1 → Tamper (SDATD pin) = 1
SYS
= 0, 1 or 2, APL [1] = 1 and ENH = 1:
BCS = 0, BSF = 0, BIF = 0, EMI = 0 → Tamper (SDATD pin) = 0
BCS = 0, BSF = 0, BIF = 0, EMI = 1 → Tamper (SDATD pin) = 1
BCS = 1, BSF = 1, BIF = 1, EMI = 1 → Tamper (SDATD pin) = 1
In peripheral application mode these information can be read out by SPI interface checking
the 3-ph status bits, or the status bits corresponding to each phase.
9.10.1 Sum of currents is above tamper threshold (status bit BCS )
Tamper detection through bit BCS is meaningful only for SYS = 0, 2, 5, 6 (systems with
neutral wire). In other measurement systems it is not useful because there are not enough
input current streams.
The STPMC1 check tamper detection only if