Datasheet

STPMC1 Theory of operation
Doc ID 15728 Rev 7 27/77
information about this signal is also available in the status bit BIL , one per each phase (see
Tabl e 32 ).
The three phase status bit
BIL is the AND of each phase status bit BIL .
The no-load condition occurs when the product between U
X
and I
X
register values is below
a given value. This value can be set by the LTCH
configuration bits. Four different no-load
threshold values can be chosen according to the two LTCH
bits as reported in Tabl e 14 .
When a no-load condition occurs (
BIL = 1) the integration of power is suspended. The no-
load condition flag
BIL in standalone mode blocks generation of pulses for stepper and is
brought out to the output selector forcing SCLNLC pin low. In peripheral mode, the
BIL
signal can be accessed through the SPI interface.
The minimum output frequency (at no-load threshold) is given as % of the full-scale (FS)
output frequency, where FS internal AW frequency is 1370 Hz per phase.
Example 3: No-load condition threshold calculation
An energy meter has a power constant of C = 64000 pulses/kWh on LED pin.
It is valid the following relation:
C = 3600000 * f / P
where 3600000 is the factor between kWh and Ws and f is the output frequency on the
LED pin if P power is applied to the meter.
The minimum output frequency if LTCH
[0] = LTCH [1] = 1 is:
f = 0,010 * 1370 Hz = 0,137 Hz
which gives a no-load condition power threshold equal to:
P = 3600000 * 0,137 Hz / 64000imp/kWh = 7,7 W
In this example, the no-load threshold is equivalent to 7,7 W of load or to a start-up
current of 32 mA at 240 V.
In NLC function is also implemented an hysteresis. When the current is falling the threshold
is half lower than that described above.
9.9 Error detection (status bits: BCF , PIN )
The STPMC1 has two error detection circuits that checks:
● the ΔΣ signals
● the state of output pins
The first error detection circuit checks if any of the ΔΣ signals from the analog part is stuck at
1 or 0 within the period of observation (250 µs). In case of detected error the corresponding
ΔΣ signal is replaced with an idle ΔΣ signal, which represents a constant value 0. When this
Table 14. No-load detection thresholds
LTCH (2 bits) NLC threshold
0 0,00125*FS
1 0,0025*FS
2 0,005*FS
3 0,010*FS