Datasheet

STPMC1 Theory of operation
Doc ID 15728 Rev 7 25/77
If the counted number of f
MCLK
/8 pulses between two trailing edges of LIN is lower than the
2
16
equivalent pulses, the base frequency exceeds the upper limit. In this case, such error
must be repeated three times, in order to set the error flag
BFR , as shown in Figure 10 .
The in-band base frequency resets the flag BFR . If BFR is cleared, the measured period
value is latched, otherwise a default value of period is used as a stable data to compute
frequency needed to adapt the decimation filter and to perform frequency compensation of
reactive energy and RMS current I
X
in case of non Rogowski current sensor.
The
BFR flag is also set if the register value of the RMS is too low. In this case also the
status bit
LOW is set.
The condition for setting
LOW and consequently BFR of each phase is U
X
< U
Xmax
/32
(U
Xmax
= 2
12
) it means if the U
X
register drops below 128 LOW and BFR are cleared when
the register value goes above 256 (U
X
> U
Xmax
/16). BFR , then, gives also information about
the presence of the line voltage.
When the
BFR error is set, the computation of power is zero and the energy registers
(active, reactive and fundamental) are blocked, unless single wire mode operation is entered
(see
Section 9.7 ).
When the MOP, MON and LED pins are configured to provide the pulsed energy information
they are held low if
BFR is set.
The 3-ph status bit
BFF is the OR of each phase bit BFR .
9.7 Single wire operation mode: SWM (status bits: NAH , BFR ,
configuration bit FRS
)
The STPMC1 supports single wire meter (SWM) operation. In this condition, since there is
no voltage information, the current RMS values, instead of the energies, are accumulated in
20-bit dedicated registers located in ACR, ACS, ACT (20-bit accumulator of RMS I
X
per hour
[Ah]).
Figure 10.
LIN and BFR behavior when f
line
> f
MCLK
/2
16