Datasheet

STPMC1 Theory of operation
Doc ID 15728 Rev 7 23/77
reason, all blocks of the digital part, except the SPI interface, are held in a reset state for 125
ms after a power on reset (see
Section 9.3 ).
The second task of the clock generator is to provide all necessary clocks for the digital part.
In this task, a MDIV
and FR1 programming bits are used to inform the device about the
nominal frequency value from XTAL1 (f
XTAL1
).
Four nominal frequencies are possible through proper setting of the MDIV
and FR1 bits (see
Tabl e 10 ).
The internal master clock f
MCLK
is derived from f
XTAL1
as shown in Tabl e 1 0 .
Through the HSA bit the frequency of the output pin CLK (f
CLK
), which provides the clock for
the STPMSx devices, can be derived as reported in
Tabl e 11 .
To properly work with STPMS2, the clock configurations in Tabl e 1 2 must be used.
Moreover, with STPMS2 companion chip the PM
bit must always be set.
9.5 Zero crossing detection (signal ZCR )
The STPMC1 has a zero crossing detection circuit on the voltage channel that can be used
to synchronize some utility equipment to zero crossing or max of line voltage events. This
circuit produces the internal signal
ZCR that has a falling edge every zero crossing of one of
the line voltages and a rising edge every peak (positive or negative) of one of the line
voltages.
The
ZCR signal is a 3-phase voltage zero cross signal. It is the result of a XNOR of the ZCR
of each phase. The
ZCR of each of the three-phases is a 100 Hz signal, so a 3-phase ZCR
Table 10. Frequency settings through MDIV
and FR1
(1)
1. 4 MHz and 8 MHz clock are also supported. MDIV and FR1 have to be set as for 4.194 MHz and 8.192
MHz respectively.
f
XTAL1
MDIV (1 bit) FR1 (1 bit) f
MCLK
4.194 MHz 0 0 8.389 MHz
4.915 MHz 0 1 9.830 MHz
8.192 MHz 1 0 8.192 MHz
9.830 MHz 1 1 9.830 MHz
Table 11. CLK pin frequency settings through HSA
HSA (1 bit) f
CLK
STPMC1
0f
XTAL1
/ 4
1f
XTAL1
/ 2
Table 12. STPMC1 configuration for STPMS2
MDIV (1 bit) HSA (1 bit) f
CLK
00f
XTAL1
/ 4
10f
XTAL1
/ 4
01f
XTAL1
/ 2