Datasheet

STPMC1 Theory of operation
Doc ID 15728 Rev 7 21/77
The calculator, thanks to its flexibility, can work in all worldwide distribution network
standards. By programming the SYS
OTP bits, it is possible to implement the following
systems:
● 3-phase, 4-wire RSTN, 4-system RSTN (tamper);
● 3-phase, 4-wire RSTN, 3-system RST;
● 3-phase, 3-wire RST_, 3-system RST_ (tamper);
● 3-phase, 3-wire RST_, 2-system R_T_ (Aron);
● 2-phase, 3-wire _STN, 2-system _ST_ (America);
● 1-phase, 2-wire __TN, 2-system _ST_ (tamper coil:coil);
● 1-phase, 2-wire __TN, 2-system _ST_ (tamper coil:shunt);
● 1-phase, 2-wire __TN, 1-system __T_.
The results of all DSP units are available as pulse frequency on pin LED, MOP and MON,
which can also drive a stepper counter, and as states on the digital outputs of device or as
data bits in data records, which can be read from the device by means of SPI interface from
pins SDA, SNC, SCL and SYN. This system bus interface is also used during temporary or
permanent programming OTP bits and system signals or to execute a remote reset request.
A logic block common to all DSP units performs other operations like:
● selecting the valid phase period result from which line frequency is computed in NDSP
unit
● checking the equality of phase angles between all three phase voltages
● preparing current values for compensation of external intermediate phase magnetic
influences
● checking the sum of currents
● computing intermediate phase voltages
● combining the 3-phase status bits
● performing a watchdog user function
After the device is fully tested, configured and calibrated, a dedicated bit of the OTP block,
called TSTD, can be written permanently in order to prevent the change of any configuration
bit.
9.2 Power supply
The supply pins for the analog part are V
CC
and V
SS
. The V
CC
is the power input of the 1.8
V low drop regulator, band-gap reference and bias generators.
From the V
CC
pin a linear regulator generates the +1.8 V voltage supply level (V
DD
) which is
used to power the OTP module and digital core. The V
SS
pin represents the reference point
for all the internal signals. 100 nF low ESR capacitors should be connected between V
CC
and V
SS
, and 1 µF between V
DD
and V
SSA
. All these capacitors must be placed very close
to the device.
The STPMC1 contains a power on reset (POR) detection circuit. If the V
CC
supply is less
than 2.5 V then the STPMC1 goes into an inactive state, all the functions are blocked
asserting a reset condition. This is useful to ensure correct device operation at power-up
and during power-down. The power supply monitor has built-in hysteresis and filtering,
which gives a high degree of immunity from false triggering due to noisy supplies.
A bandgap voltage reference (VBG) of 1.23 V ±1% is used as a reference voltage level