STPM10 Programmable single-phase energy metering IC with tamper detection Datasheet − production data Features ■ Measures active, reactive, and apparent energies ■ Current, voltage RMS and instantaneous measurement ■ Frequency measurement ■ Ripple-free active energy pulsed output ■ Live and neutral monitoring for tamper detection ■ TSSOP20 Fast and simple one-point digital calibration over the whole current range ■ Integrated linear voltage regulators for digital and analog supply ■ Selecta
Contents STPM10 Contents 1 Schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Terminology . . . . . . . . . . . . . . . . . .
STPM10 Contents 7.14 Energy to frequency conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7.15 Status bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 7.16 Programming the STPM10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7.16.1 Data records . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7.17 Configuration bits . . . . . . . . . . . . . .
List of tables STPM10 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. 4/53 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum ratings .
STPM10 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin connections (top view) . . . .
Schematic diagram STPM10 1 Schematic diagram Figure 1.
STPM10 Pin configuration 2 Pin configuration Figure 2. Pin connections (top view) Table 2.
Maximum ratings STPM10 3 Maximum ratings Table 3. Absolute maximum ratings Symbol Parameter VCC DC input voltage IPIN Current on any pin (sink/source) VID Input voltage at digital pins (SCS, ZCR, WDG, SYN, SDA, SCL, LED) VIA Input voltage at analog pins (IIP1, IIN1, IIP2, IIN2, VIP, VIN) Value Unit -0.3 to 6 V ± 150 mA -0.3 to VCC + 0.3 V -0.7 to 0.7 V ± 3.
STPM10 4 Electrical characteristics Electrical characteristics VCC = 5 V, TA = 25 °C,100 nF to 1 µF between VDDA and VSS, 100 nF to 1 µF between VDDD and VSS, 100 nF to 1 µF between VCC and VSS unless otherwise specified. Table 5. Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max.
Electrical characteristics Table 5. Symbol STPM10 Electrical characteristics (continued) Parameter Test conditions Min. Typ. Max.
STPM10 Table 5. Symbol TC Electrical characteristics Electrical characteristics (continued) Parameter Temperature coefficient Test conditions Min. After calibration Typ. Max.
Terminology 5 Terminology 5.1 Measurement error STPM10 The error associated with the energy measurement made by the STPM10 is defined as: Percentage error = [STPM10 (reading) - true energy] / true energy 5.2 ADC offset error This is the error due to the DC component associated with the analog inputs of the A/D converters. Due to the internal automatic DC offset cancellation, the STPM10 measurement is not affected by DC components in the voltage and current channel.
STPM10 Typical performance characteristics 6 Typical performance characteristics Figure 3. Supply current vs. supply voltage, Figure 4. TA = 25 °C (f = 4.194MHz, 8.192MHz) RC oscillator frequency vs. VCC, R = 12 kΩ, TA = 25 °C Figure 5. RC oscillator: frequency jitter vs. temperature Analog voltage regulator: line - load regulation Figure 6.
Typical performance characteristics STPM10 Figure 7. Digital voltage regulator: line - load Figure 8. regulation Figure 9. Power supply AC rejection vs. VCC Figure 11. Error over dynamic range gain dependence 14/53 Voltage channel linearity at different VCC voltages Figure 10. Power supply DC rejection vs. VCC Figure 12.
STPM10 Typical performance characteristics Figure 13.
Theory of operation STPM10 7 Theory of operation 7.1 General operation description The STPM10 is capable of performing measurements of active, reactive and apparent energy, RMS and instantaneous voltage and current values, and line frequency information. Most of the functions are fully programmable using internal configuration bits accessible through the SPI interface. The STPM10 works as a peripheral in microcontroller-based metering systems.
STPM10 Table 6. Theory of operation Gain of voltage and current channels Voltage channels Current channels Gain Max input voltage (V) 4 ±0.30 Gain Max input voltage (V) 8X ±0.15 32X ±0.035 The gain register is included in the device configuration register with the address name PST. The table below shows the gain configuration according to the register values: Table 7.
Theory of operation 7.3 STPM10 ΣΔ A/D converters Analog-to-digital conversion in the STPM10 is carried out using two first-order Σ Δ converters. The device performs A/D conversions of analog signals on two independent channels in parallel. The current channel is multiplexed as a primary or secondary current channel in order to perform the tamper function, if enabled.
STPM10 7.4 Theory of operation Zero-crossing detection The STPM10 has a zero-crossing detector circuit on the voltage channel which can be used by application for synchronization of some utility equipment in the event of zero-crossing of the line voltage. This circuit produces the internal signal ZCR which has a rising edge every time the line voltage crosses zero, and a negative edge every time the voltage reaches its positive or negative peak. The ZCR signal is then at twice the line voltage frequency.
Theory of operation STPM10 Figure 16. LIN and BFR signals If the number of pulses counted between two trailing edges of LIN is lower than 213, the base frequency exceeds the limit (this means it is higher than fCLK/215). In this case, the error must be repeated three consecutive times in order to set the BFR error flag. For example, with a 4.194304 MHz oscillator frequency and MDIV bit clear (or 8.192 MHz with MDIV set), fCLK/4 is 1.048576 MHz.
STPM10 Theory of operation It means that if FRS is set and BFR is also set, all the energy computation is carried on as BFR was cleared. In this case then p=u*i, where u could be zero or not (if BFR was set because voltage RMS register value is below 64). When the line frequency re-enters the nominal band, the BFR flag is automatically reset. This BFR error flag is also assembled as part of the 8-bit status register (see Table 10). 7.6 Power supply The main STPM10 supply pin is the VCC pin.
Theory of operation STPM10 The no-load condition occurs when the product of the VRMS and IRMS register values is below a given value. This value can be set with the LTCH configuration bits. Four different no-load threshold values can be chosen according to the two configuration bits LTCH (see Table 8). When a no-load condition occurs (BIL=1) the integration of power is suspended and the tamper module is disabled. The BIL signal can be accessed only through the SPI interface. Table 8. 7.
STPM10 Theory of operation Equation 1 EnergyCH1 - EnergyCH2 > KCRIT (EnergyCH1 + EnergyCH2)/2; where KCRIT can be 12.5 % or 6.25 %. The detection threshold is much higher than the accuracy difference of the current channels, which should be less than 0.2 %, but, some headroom should be left for possible transition effect, due to accidental synchronism of actual load current change with the rhythm of taking the energy samples.
Theory of operation STPM10 When the secondary channel is selected to be integrated by the final energy integrator, the MUX and INH signals change according to Figure 19 below. Figure 19. Timings of tamper module - secondary channel selected This means that energy of four periods from secondary channel followed by energy of four periods from primary channel is sampled within the tamper module.
STPM10 7.11 Theory of operation Clock generator All the internal timing of the STPM10 is based on the CLKOUT signal. This signal can be generated in three different ways: 1. RC: this oscillator mode can be selected using the RC configuration bit. If RC = 1, the STPM10 runs using the RC oscillator. A resistor connected between CLKIN and ground sets the RC current. For 4 MHz operation, the recommended settling resistor is 12 kΩ. The oscillator frequency can be compensated using the CRC configuration bit.
Theory of operation STPM10 In this way the RC oscillator is started. If the registers are read again, it can be seen that RC bit is set and BANK is cleared. Once the RC startup procedure is complete, the device is clocked and active. For details on mode signals refer to Section 7.18, for SPI operations refer to Section 7.19. 7.12 Resetting the STPM10 The STPM10 has no reset pin. The device is automatically reset by the POR circuit when the VCC crosses the 2.
STPM10 7.14 Theory of operation Energy to frequency conversion The STPM10 provides energy to frequency conversion both for calibration and energy readout purposes. In fact, one convenient way to verify the meter calibration is to provide a pulse train signal with 50% duty cycle whose frequency signal is proportional to the active energy under steady load conditions. In this case, the user chooses a certain number of pulses on the LED pin that correspond to 1 kWh. This value is called P.
Theory of operation 7.15 STPM10 Status bits The STPM10 includes 8 status bits which provide information about the current status of the meter. The status bits are the following: Table 10.
STPM10 Theory of operation 7.16 Programming the STPM10 7.16.1 Data records The STPM10 has 8 internal data record registers. Every data record consists of a 4-bit parity code and 28-bit data value where the parity code is computed from the data value, which makes a total of 32 bits, or 4 bytes. Figure 21 shows the data record structure with the name of the contained information. Each bit of parity nibble is defined as odd parity of all seven corresponding bits of data nibbles.
Theory of operation STPM10 Each configuration bit can be written by sending a byte command to STPM10 through its SPI interface. The procedure to write the configuration bits is described in Section 7.19: SPI interface. Table 11. Configuration bit map Address Name n. of bits 0 - 1 Reserved 000001 1 MDIV 1 Measurement frequency range selection: - MDIV=0: 4.000 MHz to 4.194 MHz - MDIV=1: 8.000 MHz to 8.
STPM10 Theory of operation Table 11. Configuration bit map (continued) Address Name 6-bit binary DEC 001110 14 001111 15 (1) n. of bits Description (1) KMOT 2 Selection of pulses for LED: KMOT=0 Type 0 Active KMOT=1 Type 1 Active KMOT=2 Reactive KMOT=3 Apparent Energy Energy Energy Energy 010000 16 - 1 Reserved 010001 17 - 1 Reserved 010010 18 BGTC 2 Band-gap temperature compensation bits. See Figure 17 for details.
Theory of operation Table 11. STPM10 Configuration bit map (continued) Address Name 6-bit binary DEC 101000 40 101001 41 101010 42 101011 43 101100 44 101101 45 101110 46 n. of bits Description (1) 8 8-bit unsigned data for secondary current channel calibration. 256 values are possible. When CHS is 0 the calibrator is at -12.5% of the nominal value. When CHS is 255 the calibrator is at +12.5%. The calibration step is then 0.098%.
STPM10 Theory of operation 7.18 Mode signals The STPM10 includes 8 mode signals located in the DFP data record. 3 of these are used only for internal testing purposes while 5 are useful to change some of the operations of the STPM10. The mode signals are not retained when the STPM10 supply is not available and they are cleared when a POR occurs, but they are not cleared when a remote reset command (RRR) is sent through SPI.
Theory of operation 7.19 STPM10 SPI interface The SPI interface supports a simple serial protocol, which is implemented to enable communication between some master system (microcontroller or PC) and the device. Three tasks can be performed with this interface: – remote resetting of the device – reading data records – writing the mode bits and the configuration bits Four pins of the device are dedicated to this purpose: SCS, SYN, SCL and SDA.
STPM10 7.20 Theory of operation Remote reset The timing diagram of this operation is shown in Figure 22. The time step can be as short as 30 ns. The internal reset signal is called RRR. Unlike the POR, the RRR signal does not cause the 30 ms delayed restart of the analog module, and the 120 ms delay in the restart of the digital module. This signal does not clear the mode signals. Figure 22. Timing for providing remote reset request (1) SCS SYN SCLNLC SDATD t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 1.
Theory of operation STPM10 significant nibble (MSN, LSN). This division makes sense with the MSB of the data value because its MSN holds the parity code rather than useful data. The sequence of the data record during the read operation is fixed. Normally, an application reads the 1st through the 6th data record; the 7th and 8th data record would be read only when it needs to fetch the configuration data. However, an application may apply a precharge command (see Table 12) prior to the reading phase.
STPM10 Theory of operation t1 →t2: Latching phase. Interval value > 2/fCLK t2 →t3: Data latched, SPI idle. Interval value > 30 ns t3 →t4: Enable SPI for read operation. Interval value > 30 ns t4 →t5: Serial clock counter is reset. Interval value > 30 ns t5 →t6: SPI reset and enabled for read operation. Interval value > 30 ns t7: Internal data transferred to SDA t8: SDA data is stable and can be read The system that reads the data record from the STPM10 should check the integrity of each data record.
Theory of operation STPM10 t1 →t2 (> 30 ns): SPI out of idle state t2 →t3 (> 30 ns): SPI enabled for write operation t3: data value is placed in SDA t4: SDA value is stable and shifted into the device t3 →t5 (> 10 µs): writing clock period t3 →t5: 1 bit data value t5 →t6: 6 bit address of the destination latch t6 →t7: 1 bit EXE command t8: end of SPI writing t9: SPI enters idle state The same procedure should be applied for the mode signals, but in this case the 6-bit address must be taken from Table 12.
STPM10 Theory of operation In case of a precharge command (0xFF), the emulation above is not necessary. Due to the pull-up device on the SDA pin of the STPM10, the processor needs to perform the following steps: 1. Activate SYN first in order to latch the results 2. After at least 1 µs, activate SCS 3. Write one byte to the transmitter of SPI (this produces 8 pulses on SCL with SDI=1) 4. Deactivate SYN 5. Optionally read the data records (the sequence of reading is altered) 6. Deactivate SCS 7.
Theory of operation STPM10 Equation 9 dv/dt →v(t) = V ⋅ sin ωt; [see Figure 26 - 7] Equation 10 i(t) → I( t) = ∫ I i ( t ) ⋅ dt = – -- ⋅ cos ( wt + ϕ) ω [see Figure 26 - 8] Figure 26. Active energy computation diagram At this point four signals are available.
STPM10 Theory of operation Equation 12 ⋅ I ⋅ cos ϕ – V ⋅ I ⋅ cos ( 2wt + ϕ-) p2 ( t ) = v ( t ) ⋅ i ( t ) = – V -------------------------------------------------------------------------------------2 2 [see Figure 26 - 10] After these two operations, another stage performs the subtraction between the results p2 and p1 and a division by 2, obtaining the active power: Equation 13 ( p 2 ( t ) – p1 ( t ) ) V ⋅ I ⋅ cos ϕ p ( t ) = -----------------------------------= --------------------------------2 2 [see F
Theory of operation STPM10 Equation 16 1 1 VI Q = --- ⋅ Q1 ( t ) ⋅ ω + Q2 ( t ) ⋅ --- = ------ sin ϕ 2 ω 2 Since the above computation would need significant additional circuitry, the reactive power in the STPM10 is calculated using only the Q1(t) multiplied by ω, which means: Equation 17 1 VI Q 3 ( t ) = --- ⋅ Q1 ( t ) ⋅ ω= ------ ⋅ ( sin ϕ– sin ( 2 ωt + ϕ) ) 2 2 The reactive power, then, presents a ripple at twice the line frequency.
STPM10 Theory of operation For the apparent power, another value is produced: Equation 21 T 1 ⋅ ω --- ∫ v2 ( t ) dt = V -------------T 2 0 Multiplying Equation 18 and Equation 21, the apparent power is produced: Equation 22 I V ⋅ ω VI S = ----------------- ⋅ -------------- = -----2 ω⋅ 2 2 The DSP then performs the integration of the computed powers into energies. These integrators are implemented as up/down counters and they can roll over.
Theory of operation STPM10 Let's consider the basic information needed to start the calibration procedure: Table 13. Working point settings Parameter Value Line RMS voltage Vn 230 V Line RMS current In 5A Power sensitivity P LED: P=128000 pulses/kWh Shunt sensor KS 0.42 mv/A The typical STPM10 parameters and constants are also known (see Table 14). Table 14. Device constants Parameter Value Tolerance VBG 1.
STPM10 Theory of operation To obtain the greatest correction dynamic, initially calibrators are set in the middle of the range, thus obtaining a calibration range of 12.5% per voltage or current channel: Calibrator value Kv = Ki = 0.875 Ci = Cv = 128 In this way, it is possible to tune Kv and Ki to obtain a precise measurement: for example Cv = 0 generates a correction factor of -12.5% (Kv = 0.75) and Cv = 255 determines a correction factor of +12.5% (Kv = 1), and so on.
Application design 8 STPM10 Application design The choice of the external components in the transduction section of the application is a crucial point in the application design, affecting the precision and the resolution of the whole system. Among the several considerations, a compromise has to be found between the following needs: 1. Maximize the signal to noise ratio in the voltage channel, 2.
STPM10 Application design Figure 27. STPM10 reference schematic with one current transformer and one shunt 6/40 6$$! * #/. ! $ 2 K 6$$ 7 7 40 5 # M # N # M # M -/. -/0 3#3 6$$$ 633 6## 6/40 6$$! ))0 )). ,%$ 3$! 4$ 3#, .,# #,+/54 #,+). 39. 6). 6)0 )). ))0 2 340- 9 2 -(Z K #4 # # 0 0 2 2 2 K # .
Package mechanical data 9 STPM10 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
STPM10 Package mechanical data TSSOP20 mechanical data mm. inch. Dim. Min. Typ. Max. A Min. Typ. Max. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 D 6.4 6.5 6.6 0.252 0.256 0.260 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0° L 0.45 A 0.0256 BSC 0.60 8° 0° 0.75 0.018 8° 0.024 0.
Package mechanical data STPM10 Tape & reel TSSOP20 mechanical data mm. inch. Dim. Min. A Max. Min. 330 13.2 Typ. Max. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 50/53 Typ. 0.504 22.4 0.519 0.882 Ao 6.8 7 0.268 0.276 Bo 6.9 7.1 0.272 0.280 Ko 1.7 1.9 0.067 0.075 Po 3.9 4.1 0.153 0.161 P 11.9 12.1 0.468 0.
STPM10 Package mechanical data Figure 28. TSSOP20 footprint recommended data Table 17. Footprint data Values mm. inch. A 7.26 0.286 B 4.93 0.194 C 0.36 0.014 D 0.65 0.025 E 6.21 0.
Revision history STPM10 10 Revision history Table 18. Document revision history Date Revision 31-Aug-2010 1 Initial release. 25-Nov-2010 2 Modified: Table 5 on page 9, 7.9: Tamper detection module on page 22. Added: 7.11.1: RC startup procedure on page 25 and 8: Application design on page 46. 09-Jun-2011 3 Updated Table 5. 29-Jan-2013 4 Updated Table 9.
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