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February 2012 Doc ID 14714 Rev 5 1/27

STP24DP05

24-bit constant current LED sink driver with output error detection

Features

■ Low-voltage power supply down to 3 V

■ 8 x 3 constant current output channels

■ Adjustable output current through external

resistors

■ Short and open output error detection

■ Serial data IN/parallel data OUT

■ Shift register data flow register control

■ Accepts 3.3 V and 5 V micro driver

■ Output current: 5-80 mA

■ 25 MHz clock frequency

■ High thermal efficiency package

Description

The STP24DP05 is a monolithic, low-voltage, low

current power 24-bit shift register designed for

LED panel displays. The device contains an

8 x 3-bit serial-IN, parallel-OUT shift register that

feeds a 8 x 3-bit D-type storage register. In the

output stage, twenty four regulated current

sources were designed to provide 5-80 mA

constant current to drive the LEDs.

The 8 x 3 shift register data flow sequence order

can be managed through two dedicated pins.

The STP24DP05 has a dedicated pin to activate

the outputs with a sequential delay, that prevents

inrush current during output turn-ON.

The device detection circuit checks 3 different

conditions that can occur on the output line: short

to GND, short to V

, or open line.

The data detection results are loaded in the shift

registers and shifted out via the serial line output.

The detection functionality is activated with a

dedicated pin or alternatively, through a logic

sequence that allows the user to enter or exit

detection mode.

Through three external resistors, the user can

adjust the output current for each 8-channel

group, therefore controlling the light intensity

of LEDs.

The STP24DP05 guarantees a 20 V output

driving capability, allowing the user to connect

more LEDs in series.

The high clock frequency, 25 MHz, makes the

device suitable for high data rate transmission.

The 3.3 V of voltage supply is useful for

applications that interface any microcontroller

from 3.3 V.

TQFP48-EP

Table 1. Device summary

Order code Package Packaging

STP24DP05BTR TQFP48-EP

(1)

Tape and reel

1. Thermal pad size: 3.5 mm x 3.5 mm.

www.st.com

Summary of content (27 pages)

PAGE 1
STP24DP05 24-bit constant current LED sink driver with output error detection Features ■ Low-voltage power supply down to 3 V ■ 8 x 3 constant current output channels ■ Adjustable output current through external resistors ■ Short and open output error detection ■ Serial data IN/parallel data OUT ■ Shift register data flow register control ■ Accepts 3.
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Contents STP24DP05 Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 2 Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 Thermal data . . . . . . . . . . . . . . . . . .
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STP24DP05 1 Summary description Summary description Table 2. Current accuracy Typical current accuracy Output voltage Output current Between bits 1.1 VDD Temperature 3.3 V to 5 V 25 °C Between ICs ≥ 1.0 V ± 3% ± 6% ≥ 15 to 80 mA ≥ 0.2 V ± 6% ± 6% 5 to 15 mA Pin connection and description Figure 1. Pin connection TQFP48 exposed pad Note: The exposed pad should be electrically connected to a PCB metal dissipation area electrically isolated or connected to ground.
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Summary description Table 3.
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STP24DP05 Electrical ratings 2 Electrical ratings 2.1 Absolute maximum ratings Stressing the device above the ratings listed in Table 4 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4. Absolute maximum ratings Symbol 2.
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Electrical ratings 2.3 STP24DP05 Recommended operating conditions Table 6. Symbol Recommended operating conditions Parameter Test conditions Min. Typ. Max. Unit 5.5 V 20 V 80 mA VDD Supply voltage VO Output voltage IO Output current OUTn IOH Output current Serial-OUT +10 mA IOL Output current Serial-OUT -10 mA VIH Input voltage 0.7 VDD VDD+0.3 V VIL Input voltage -0.3 0.
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STP24DP05 3 Electrical characteristics Electrical characteristics T = 25 °C, unless otherwise specified. Table 7. Symbol Electrical characteristics (VDD = 3.3 V to 5 V) Parameter Test conditions Min. Typ. Max. Unit VIH Input voltage high level 0.7 VDD VDD V VIL Input voltage low level GND 0.3 VDD V IOH Output leakage current VOH = 20 V 10 μA VOL Output voltage (Serial-OUT) IOL = 1 mA 0.
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Electrical characteristics Table 7. Electrical characteristics (VDD = 3.3 V to 5 V) (continued) Symbol Parameter Thermal Thermal protection VTF Output voltage ITF Output current VEF Output voltage IEF Output current Table 8. STP24DP05 Test conditions Min. Max. 170 °C 5 VTF @ 1 V V 20 mA 5 VEF @ 1 V Unit V 20 mA Switching characteristics (VDD = 3.
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STP24DP05 Block diagram 4 Block diagram Figure 2.
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Equivalent circuit and outputs 5 10/27 STP24DP05 Equivalent circuit and outputs Figure 3. OExx terminal Figure 4. LE\DM terminal Figure 5.
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STP24DP05 Equivalent circuit and outputs Figure 6. SDO terminal Figure 7.
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Timing diagrams 6 Timing diagrams Figure 8. Note: 12/27 STP24DP05 Timing diagram 1 Latch and output enable are level sensitive and are not synchronized with rising-or-falling edge of CLK signal. 2 When LE\DM terminal is low level, the latch circuit holds the previous set of data. 3 When LE\DM terminal is high level, the latch circuit refreshes the new set of data from the SDI chain.
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STP24DP05 Timing diagrams Figure 9.
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Timing diagrams STP24DP05 Figure 10. Clock, serial-IN, latch, enable, outputs Figure 11.
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STP24DP05 Features description 7 Features description 7.1 DG: gradual output delay This feature prevents large inrush current and reduces the bypass capacitors. The fixed delay time can be activated with DG = LOW and the typical output delay is 30 ns for each group of 8 outputs, R, G, and B. E.g.: R1, G1, B1 has no delay, R2, G2, B2 has 30 ns delay and R3, G3, B3, has 60 ns delay, etc. Table 9.
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Features description STP24DP05 Figure 12. Detection circuit 23 24 STP24DP05 16 7.3 Phase one: “entering detection mode” From the “normal mode” condition the device can switch to the “error detection mode” through a DM PIN set to LOW or a logic sequence on the OE-R\DM and LE\DM pins as shown in Figure 13, 14 and Table 12: Figure 13. EDM timing diagram using a DM pin OE-R\DM Table 12.
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STP24DP05 Features description Figure 14. SPI sequence to enter detection mode - time diagram OE-R\DM LE\DM After these five CLK cycles the device goes into “error detection mode” and at the 6th rise front of CLK, the SDI data are ready for the sampling. 7.4 Phase two: “error detection” The eight data bits must be set “1” in order to set all the outputs ON during detection. The data are latched by LE\DM and after that the outputs are ready for the detection process.
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Features description 7.5 STP24DP05 Phase three: “resuming normal mode” In order to re-enter normal mode, either the LE\DM pin or the sequence shown in the following table can be used: Table 13. SPI sequence to resume in normal mode - truth table CLK 1° 2° 3° 4° 5° OE-R\DM H L H H H LE\DM L L L L L Note: For proper device operation the “entering detection” sequence must be followed by a “resume mode” sequence, it is not possible to insert a consecutive equal sequence. 7.
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STP24DP05 7.7 Features description EFLAG/TFLAG - output detection and overtemperature monitoring The open drain output EFLAG and TFLAG are used to report the STP24DP05 status flags. During normal operating conditions, the EFLAG/TFLAG pins should be pulled up through an external resistor. The EFLAF is turned on (shorted to GND) while the error detection is running. The TFLAG is turned on (shorted to GND) when the silicon temperature exceeds 180 °C. Figure 16.
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Typical application schematic 8 STP24DP05 Typical application schematic Figure 17.
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STP24DP05 Typical characteristics Figure 18. Typical external resistor values vs. output current capabilities 4500 4000 External Resistance (Ohm) 9 Typical characteristics 3500 Temp. = 25°C Vdd = 5.0V Iset = 5mA; 10mA; 20mA; 50mA; 80mA 3000 2500 2000 1500 1000 500 0 0 10 20 30 40 50 60 70 80 90 Output Current (mA) Table 15. Typical external resistor values vs. output current capabilities Iset 5 mA 10 mA 20 mA 50 mA 80 mA Rext (Ω) 4210 2050 1000 400 249 Figure 19.
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Package mechanical data 10 STP24DP05 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
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STP24DP05 Package mechanical data Table 17. TQFP48-EP mechanical data Dim. Min. Typ. A Max 1.20 A1 0.05 0.15 A2 0.95 1.00 1.05 b 0.17 0.22 0.27 c 0.09 D 8.80 9.00 9.20 D1 6.80 7.00 7.20 0.20 D2 3.50 D3 5.50 E 8.80 9.00 9.20 E1 6.80 7.00 7.20 E2 3.50 E3 5.50 e 0.50 L 0.45 L1 k 0.60 0.75 1.00 0 ccc 3.5 7 0.
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Package mechanical data STP24DP05 Figure 20.
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STP24DP05 Package mechanical data Figure 21. Tape and reel TQFP48-EP Tape & Reel TQFP48 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 TYP. 0.504 22.4 0.519 0.882 Ao 9.5 9.7 0.374 0.382 Bo 9.5 9.7 0.374 0.382 Ko 2.1 2.3 0.083 0.091 Po 3.9 4.1 0.153 0.161 P 11.9 12.1 0.468 0.
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Revision history 11 STP24DP05 Revision history Table 18. 26/27 Document revision history Date Revision Changes 19-Apr-2008 1 First release 12-Jan-2009 2 Updated package to TQFP48-EP 04-Mar-2009 3 Updated Table 3 on page 4 13-Nov-2009 4 Updated Table 3 on page 4 21-Feb-2012 5 – Modified: Section 6, 7.4 and 7.
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STP24DP05 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.